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Searched refs:SPRN_L1CSR0 (Results 1 – 3 of 3) sorted by relevance

/linux/arch/powerpc/kernel/
A Dcpu_setup_fsl_booke.S30 mfspr r0, SPRN_L1CSR0
36 mtspr SPRN_L1CSR0, r0 /* Disable */
40 mtspr SPRN_L1CSR0, r0 /* Invalidate */
42 1: mfspr r0, SPRN_L1CSR0
49 mtspr SPRN_L1CSR0, r0 /* Enable */
/linux/arch/powerpc/kvm/
A De500_emulate.c248 case SPRN_L1CSR0: in kvmppc_core_emulate_mtspr_e500()
378 case SPRN_L1CSR0: in kvmppc_core_emulate_mfspr_e500()
/linux/arch/powerpc/include/asm/
A Dreg_booke.h173 #define SPRN_L1CSR0 0x3F2 /* L1 Cache Control and Status Register 0 */ macro

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