SPRN_L1CSR1 (reference) in projects: linux

Searched refs:SPRN_L1CSR1 (Results 1 – 5 of 5) sorted by relevance

/linux/arch/powerpc/kernel/
A D	cpu_setup_fsl_booke.S	`20 mfspr r0, SPRN_L1CSR1 25 mtspr SPRN_L1CSR1, r0 /* Enable I-Cache */`
A D	traps.c	`627 mtspr(SPRN_L1CSR1, mfspr(SPRN_L1CSR1) \| L1CSR1_ICFI); in machine_check_e500mc() 628 while (mfspr(SPRN_L1CSR1) & L1CSR1_ICFI) in machine_check_e500mc()`
/linux/arch/powerpc/mm/nohash/
A D	fsl_book3e.c	`253 tmp = mfspr(SPRN_L1CSR1); in flush_instruction_cache() 255 mtspr(SPRN_L1CSR1, tmp); in flush_instruction_cache()`
/linux/arch/powerpc/kvm/
A D	e500_emulate.c	`252 case SPRN_L1CSR1: in kvmppc_core_emulate_mtspr_e500() 381 case SPRN_L1CSR1: in kvmppc_core_emulate_mfspr_e500()`
/linux/arch/powerpc/include/asm/
A D	reg_booke.h	`174 #define SPRN_L1CSR1 0x3F3 /* L1 Cache Control and Status Register 1 */ macro`

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