Searched refs:SPRN_L1CSR2 (Results 1 – 2 of 2) sorted by relevance

/linux/arch/powerpc/include/asm/
A D	reg_booke.h	144 #define SPRN_L1CSR2 0x25E /* L1 Cache Control and Status Register 2 */ macro
/linux/arch/powerpc/kernel/
A D	traps.c	653 if (!(mfspr(SPRN_L1CSR2) & L1CSR2_DCWS)) in machine_check_e500mc()

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