Searched refs:SPRN_L2CSR0 (Results 1 – 2 of 2) sorted by relevance

/linux/arch/powerpc/kernel/
A D	cpu_setup_fsl_booke.S	303 mfspr r3, SPRN_L2CSR0 307 mtspr SPRN_L2CSR0,r3 311 1: mfspr r3,SPRN_L2CSR0
/linux/arch/powerpc/include/asm/
A D	reg_booke.h	178 #define SPRN_L2CSR0 0x3F9 /* L2 Data Cache Control and Status Register 0 */ macro

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