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Searched refs:SPR_DCCFGR_NCW (Results 1 – 2 of 2) sorted by relevance

/linux/arch/openrisc/kernel/
A Dsetup.c190 cpuinfo->dcache_ways = 1 << (dccfgr & SPR_DCCFGR_NCW); in setup_cpuinfo()
/linux/arch/openrisc/include/asm/
A Dspr_defs.h320 #define SPR_DCCFGR_NCW 0x00000007 macro

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