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Searched refs:SQ_CMD (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/amd/amdkfd/
A Dkfd_dbgdev.h64 #define SQ_CMD 0x8DEC macro
A Dkfd_dbgdev.c661 packets_vec[1].bitfields2.reg_offset = SQ_CMD / 4 - AMD_CONFIG_REG_BASE; in dbgdev_wave_control_diq()
/linux/drivers/gpu/drm/radeon/
A Dcik_reg.h151 #define SQ_CMD 0x8DEC macro
/linux/drivers/gpu/drm/amd/amdgpu/
A Dgfx_v7_0.c4151 value = REG_SET_FIELD(value, SQ_CMD, CMD, 0x03); in gfx_v7_0_ring_soft_recovery()
4152 value = REG_SET_FIELD(value, SQ_CMD, MODE, 0x01); in gfx_v7_0_ring_soft_recovery()
4153 value = REG_SET_FIELD(value, SQ_CMD, CHECK_VMID, 1); in gfx_v7_0_ring_soft_recovery()
4154 value = REG_SET_FIELD(value, SQ_CMD, VM_ID, vmid); in gfx_v7_0_ring_soft_recovery()
A Dgfx_v9_0.c5740 value = REG_SET_FIELD(value, SQ_CMD, CMD, 0x03); in gfx_v9_0_ring_soft_recovery()
5741 value = REG_SET_FIELD(value, SQ_CMD, MODE, 0x01); in gfx_v9_0_ring_soft_recovery()
5742 value = REG_SET_FIELD(value, SQ_CMD, CHECK_VMID, 1); in gfx_v9_0_ring_soft_recovery()
5743 value = REG_SET_FIELD(value, SQ_CMD, VM_ID, vmid); in gfx_v9_0_ring_soft_recovery()
A Dgfx_v8_0.c6444 value = REG_SET_FIELD(value, SQ_CMD, CMD, 0x03); in gfx_v8_0_ring_soft_recovery()
6445 value = REG_SET_FIELD(value, SQ_CMD, MODE, 0x01); in gfx_v8_0_ring_soft_recovery()
6446 value = REG_SET_FIELD(value, SQ_CMD, CHECK_VMID, 1); in gfx_v8_0_ring_soft_recovery()
6447 value = REG_SET_FIELD(value, SQ_CMD, VM_ID, vmid); in gfx_v8_0_ring_soft_recovery()
A Dgfx_v10_0.c8992 value = REG_SET_FIELD(value, SQ_CMD, CMD, 0x03); in gfx_v10_0_ring_soft_recovery()
8993 value = REG_SET_FIELD(value, SQ_CMD, MODE, 0x01); in gfx_v10_0_ring_soft_recovery()
8994 value = REG_SET_FIELD(value, SQ_CMD, CHECK_VMID, 1); in gfx_v10_0_ring_soft_recovery()
8995 value = REG_SET_FIELD(value, SQ_CMD, VM_ID, vmid); in gfx_v10_0_ring_soft_recovery()

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