Searched refs:SSPP_VIG0 (Results 1 – 11 of 11) sorted by relevance
| /linux/drivers/gpu/drm/msm/disp/mdp5/ |
| A D | mdp5_cfg.c | 28 [SSPP_VIG0] = 1, [SSPP_VIG1] = 4, [SSPP_VIG2] = 7,
117 [SSPP_VIG0] = 1, [SSPP_VIG1] = 4, [SSPP_VIG2] = 7,
205 [SSPP_VIG0] = 1, [SSPP_VIG1] = 4,
305 [SSPP_VIG0] = 1, [SSPP_DMA0] = 4,
377 [SSPP_VIG0] = 1, [SSPP_DMA0] = 4,
457 [SSPP_VIG0] = 1, [SSPP_VIG1] = 4,
676 [SSPP_VIG0] = 1, [SSPP_VIG1] = 9,
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| A D | mdp5_ctl.c | 292 case SSPP_VIG0: return MDP5_CTL_LAYER_REG_VIG0(stage); in mdp_ctl_blend_mask()
315 case SSPP_VIG0: return MDP5_CTL_LAYER_EXT_REG_VIG0_BIT3; in mdp_ctl_blend_ext_mask()
443 case SSPP_VIG0: return MDP5_CTL_FLUSH_VIG0; in mdp_ctl_flush_mask_pipe()
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| A D | mdp5.xml.h | 77 SSPP_VIG0 = 1, enumerator
551 case SSPP_VIG0: return (mdp5_cfg->pipe_vig.base[0]); in __offset_PIPE()
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| A D | mdp5_kms.c | 721 SSPP_VIG0, SSPP_VIG1, SSPP_VIG2, SSPP_VIG3, in hwpipe_init() enumerator
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| /linux/drivers/gpu/drm/msm/disp/dpu1/ |
| A D | dpu_hw_top.c | 138 status->sspp[SSPP_VIG0] = (value >> 4) & 0x3; in dpu_hw_get_danger_status()
235 status->sspp[SSPP_VIG0] = (value >> 4) & 0x1; in dpu_hw_get_safe_status()
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| A D | dpu_plane.c | 288 pdpu->pipe - SSPP_VIG0, in _dpu_plane_calc_fill_level()
353 trace_dpu_perf_set_qos_luts(pdpu->pipe - SSPP_VIG0, in _dpu_plane_set_qos_lut()
358 pdpu->pipe - SSPP_VIG0, in _dpu_plane_set_qos_lut()
403 trace_dpu_perf_set_danger_luts(pdpu->pipe - SSPP_VIG0, in _dpu_plane_set_danger_lut()
410 pdpu->pipe - SSPP_VIG0, in _dpu_plane_set_danger_lut()
453 pdpu->pipe - SSPP_VIG0, in _dpu_plane_set_qos_ctrl()
504 qos_params.num = pdpu->pipe_hw->idx - SSPP_VIG0; in _dpu_plane_set_qos_remap()
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| A D | dpu_hw_ctl.c | 147 case SSPP_VIG0: in dpu_hw_ctl_get_bitmask_sspp()
394 case SSPP_VIG0: in dpu_hw_ctl_setup_blendstage()
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| A D | dpu_hw_catalog.c | 527 SSPP_BLK("sspp_0", SSPP_VIG0, 0x4000, VIG_SDM845_MASK,
549 SSPP_BLK("sspp_0", SSPP_VIG0, 0x4000, VIG_SC7180_MASK,
569 SSPP_BLK("sspp_0", SSPP_VIG0, 0x4000, VIG_SM8250_MASK,
588 SSPP_BLK("sspp_0", SSPP_VIG0, 0x4000, VIG_SC7180_MASK,
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| A D | dpu_hw_mdss.h | 110 SSPP_VIG0, enumerator
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| A D | dpu_kms.c | 84 for (i = SSPP_VIG0; i < SSPP_MAX; i++) in _dpu_danger_signal_status()
85 seq_printf(s, "SSPP%d : 0x%x \t", i - SSPP_VIG0, in _dpu_danger_signal_status()
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| A D | dpu_crtc.c | 373 dpu_plane_pipe(plane) - SSPP_VIG0, in _dpu_crtc_blend_setup_mixer()
389 dpu_plane_pipe(plane) - SSPP_VIG0, in _dpu_crtc_blend_setup_mixer()
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