/linux/arch/ia64/kernel/ |
A D | entry.h | 45 .spillsp f2,SW(F2)+16+(off); .spillsp f3,SW(F3)+16+(off); \ 46 .spillsp f4,SW(F4)+16+(off); .spillsp f5,SW(F5)+16+(off); \ 47 .spillsp f16,SW(F16)+16+(off); .spillsp f17,SW(F17)+16+(off); \ 48 .spillsp f18,SW(F18)+16+(off); .spillsp f19,SW(F19)+16+(off); \ 49 .spillsp f20,SW(F20)+16+(off); .spillsp f21,SW(F21)+16+(off); \ 50 .spillsp f22,SW(F22)+16+(off); .spillsp f23,SW(F23)+16+(off); \ 55 .spillsp r4,SW(R4)+16+(off); .spillsp r5,SW(R5)+16+(off); \ 56 .spillsp r6,SW(R6)+16+(off); .spillsp r7,SW(R7)+16+(off); \ 57 .spillsp b0,SW(B0)+16+(off); .spillsp b1,SW(B1)+16+(off); \ 58 .spillsp b2,SW(B2)+16+(off); .spillsp b3,SW(B3)+16+(off); \ [all …]
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A D | entry.S | 273 st8.spill [r15]=r5,SW(R7)-SW(R5) // spill r5 277 st8.spill [r14]=r6,SW(B0)-SW(R6) // spill r6 297 st8 [r14]=r21,SW(B1)-SW(B0) // save b0 298 st8 [r15]=r23,SW(B3)-SW(B2) // save b2 302 st8 [r14]=r22,SW(B4)-SW(B1) // save b1 303 st8 [r15]=r24,SW(AR_PFS)-SW(B3) // save b3 308 st8 [r14]=r25,SW(B5)-SW(B4) // save b4 336 stf.spill [r2]=f30,SW(AR_UNAT)-SW(F30) 337 stf.spill [r3]=f31,SW(PR)-SW(F31) 372 ld8 r29=[r3],(SW(B1)-SW(AR_UNAT)) // unat [all …]
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A D | mca_asm.S | 567 add temp1=SW(F2), regs 568 add temp2=SW(F3), regs 603 stf.spill [temp1]=f30,SW(B2)-SW(F30) 604 stf.spill [temp2]=f31,SW(B3)-SW(F31) 613 st8 [temp1]=temp3,SW(AR_LC)-SW(B4) // save b4 726 add temp1=SW(F2), regs 727 add temp2=SW(F3), regs 762 ldf.fill f30=[temp1],SW(B2)-SW(F30) 763 ldf.fill f31=[temp2],SW(B3)-SW(F31) 770 ld8 temp3=[temp1],SW(AR_LC)-SW(B4) // restore b4
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A D | unwind.c | 2253 unw.sw_off[unw.preg_index[UNW_REG_PRI_UNAT_GR]] = SW(CALLER_UNAT); in unw_init() 2254 unw.sw_off[unw.preg_index[UNW_REG_BSPSTORE]] = SW(AR_BSPSTORE); in unw_init() 2255 unw.sw_off[unw.preg_index[UNW_REG_PFS]] = SW(AR_PFS); in unw_init() 2256 unw.sw_off[unw.preg_index[UNW_REG_RP]] = SW(B0); in unw_init() 2257 unw.sw_off[unw.preg_index[UNW_REG_UNAT]] = SW(CALLER_UNAT); in unw_init() 2258 unw.sw_off[unw.preg_index[UNW_REG_PR]] = SW(PR); in unw_init() 2259 unw.sw_off[unw.preg_index[UNW_REG_LC]] = SW(AR_LC); in unw_init() 2260 unw.sw_off[unw.preg_index[UNW_REG_FPSR]] = SW(AR_FPSR); in unw_init() 2261 for (i = UNW_REG_R4, off = SW(R4); i <= UNW_REG_R7; ++i, off += 8) in unw_init() 2263 for (i = UNW_REG_B1, off = SW(B1); i <= UNW_REG_B5; ++i, off += 8) in unw_init() [all …]
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/linux/Documentation/misc-devices/ |
A D | eeprom.rst | 38 Atmel 34C02B 2K 0x50 - 0x57, SW write protect at 0x30-37 39 Catalyst 34FC02 2K 0x50 - 0x57, SW write protect at 0x30-37 40 Catalyst 34RC02 2K 0x50 - 0x57, SW write protect at 0x30-37 41 Fairchild 34W02 2K 0x50 - 0x57, SW write protect at 0x30-37 42 Microchip 24AA52 2K 0x50 - 0x57, SW write protect at 0x30-37 43 ST M34C02 2K 0x50 - 0x57, SW write protect at 0x30-37
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/linux/arch/parisc/include/asm/ |
A D | floppy.h | 28 #define SW fd_routine[use_virtual_dma&1] macro 40 #define fd_get_dma_residue() SW._get_dma_residue(FLOPPY_DMA) 41 #define fd_dma_mem_alloc(size) SW._dma_mem_alloc(size) 42 #define fd_dma_setup(addr, size, mode, io) SW._dma_setup(addr, size, mode, io)
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/linux/arch/x86/include/asm/ |
A D | floppy.h | 30 #define SW fd_routine[use_virtual_dma & 1] macro 42 #define fd_get_dma_residue() SW._get_dma_residue(FLOPPY_DMA) 43 #define fd_dma_mem_alloc(size) SW._dma_mem_alloc(size) 44 #define fd_dma_setup(addr, size, mode, io) SW._dma_setup(addr, size, mode, io)
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/linux/drivers/clk/bcm/ |
A D | clk-kona.h | 57 #define gate_is_sw_controllable(gate) FLAG_TEST(gate, GATE, SW) 165 .flags = FLAG(GATE, HW)|FLAG(GATE, SW)| \ 177 .flags = FLAG(GATE, HW)|FLAG(GATE, SW)| \ 188 .flags = FLAG(GATE, HW)|FLAG(GATE, SW)| \ 198 .flags = FLAG(GATE, SW)|FLAG(GATE, SW_MANAGED)| \
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/linux/Documentation/devicetree/bindings/misc/ |
A D | aspeed,cvic.txt | 12 The AST2500 supports a SW generated interrupt 25 SW interrupts from the ARM to the coprocessor.
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/linux/arch/arm/boot/dts/ |
A D | exynos5250-arndale.dts | 34 label = "SW-TACT2"; 41 label = "SW-TACT3"; 48 label = "SW-TACT4"; 55 label = "SW-TACT5"; 62 label = "SW-TACT6"; 69 label = "SW-TACT7";
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/linux/Documentation/devicetree/bindings/power/reset/ |
A D | st-reset.txt | 1 *Device-Tree bindings for ST SW reset functionality
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/linux/Documentation/networking/device_drivers/wifi/intel/ |
A D | ipw2100.rst | 178 1 SW based RF kill active (radio off) 180 3 Both HW and SW RF kill active (radio off) 186 0 If SW based RF kill active, turn the radio back on 187 1 If radio is on, activate SW based RF kill 192 If you enable the SW based RF kill and then toggle the HW
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A D | ipw2200.rst | 314 1 SW based RF kill active (radio off) 316 3 Both HW and SW RF kill active (radio off) 322 0 If SW based RF kill active, turn the radio back on 323 1 If radio is on, activate SW based RF kill 328 If you enable the SW based RF kill and then toggle the HW
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/linux/Documentation/ABI/testing/ |
A D | sysfs-driver-hid-corsair | 5 Description: Get/set the current playback mode. "SW" for software mode
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/linux/Documentation/devicetree/bindings/reset/ |
A D | snps,hsdk-reset.txt | 10 configuration register and second for corresponding SW reset and status bits
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/linux/arch/powerpc/kernel/ |
A D | align.c | 41 #define SW 0x20 /* byte swap */ macro 227 if (flags & SW) { in emulate_spe()
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/linux/Documentation/hwmon/ |
A D | fam15h_power.rst | 102 iii. At time x, SW reads CpuSwPwrAcc MSR and samples the PTSC. 106 iv. At time y, SW reads CpuSwPwrAcc MSR and samples the PTSC.
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/linux/Documentation/devicetree/bindings/arm/freescale/ |
A D | fsl,imx7ulp-sim.yaml | 15 and a set of registers have been made available in DGO domain for SW use, with the
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/linux/Documentation/hid/ |
A D | hid-alps.rst | 149 SW ON/OFF status 174 SW ON/OFF status
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/linux/Documentation/devicetree/bindings/pci/ |
A D | brcm,iproc-pcie.txt | 31 by the ASIC after power on reset. In this case, SW is required to configure 35 by the ASIC after power on reset. In this case, SW needs to configure it
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/linux/Documentation/devicetree/bindings/leds/backlight/ |
A D | richtek,rt4831-backlight.yaml | 39 Specify the backlight dimming following by PWM duty or by SW control.
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/linux/drivers/regulator/ |
A D | mc13xxx.h | 104 MC13xxx_DEFINE(SW, _name, _node, _reg, _vsel_reg, _voltages, ops)
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/linux/Documentation/devicetree/bindings/thermal/ |
A D | nvidia,tegra30-tsensor.yaml | 19 Generates an interrupt to SW to lower temperature via DVFS on reaching
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/linux/Documentation/admin-guide/media/ |
A D | radio-cardlist.rst | 41 radio-raremono Thanko's Raremono AM/FM/SW radio
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/linux/Documentation/devicetree/bindings/mfd/ |
A D | max77620.txt | 43 source (SW). When enabled/disabled, the master sequencing timer generates 80 software (SW).
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