Searched refs:SW1 (Results 1 – 25 of 26) sorted by relevance
12
/linux/arch/arm64/boot/dts/renesas/ |
A D | rzg2l-smarc-som.dtsi | 11 /* SW1[2] should be at position 2/OFF to enable 64 GB eMMC */ 16 * SW1[2] should be at position 3/ON. 182 * SD0 device selection is XOR between GPIO_SD0_DEV_SEL and SW1[2] 185 * SW1[2] should be at position 2/OFF to enable 64 GB eMMC 186 * SW1[2] should be at position 3/ON to enable uSD card CN3
|
/linux/Documentation/hid/ |
A D | hid-alps.rst | 114 1 0 0 SW6 SW5 SW4 SW3 SW2 SW1 148 SW1-SW6: 164 Byte1 1 1 1 0 1 SW3 SW2 SW1 173 SW1-SW3:
|
/linux/Documentation/networking/ |
A D | arcnet-hardware.rst | 829 SW1 1-6: I/O Base Address Select 1063 SW1: DIP-Switches for Station Address 1573 SW1 1-6: Base I/O Address Select 1839 | |SW1| o|o | 1850 SW1 1-6 Base I/O Address Select 1995 SW1 1-5: Base Memory Address Select 2141 SW1 1-5 Base Memory Address Select 2867 SW1 1-5: Base Memory Address Select 3036 SW1 1-5: IRQ Select 3047 SW1: Timeouts, Interrupt and ROM [all …]
|
/linux/Documentation/devicetree/bindings/regulator/ |
A D | pv88060.txt | 11 BUCK1, LDO1, LDO2, LDO3, LDO4, LDO5, LDO6, LDO7, SW1, SW2, SW3, SW4, 84 SW1 {
|
/linux/drivers/regulator/ |
A D | pcap-regulator.c | 131 VREG_INFO(SW1, PCAP_REG_SWCTRL, 1, 2, NA, NA), 228 VREG(VAUX4), VREG(VSIM), VREG(VSIM2), VREG(VVIB), VREG(SW1), VREG(SW2),
|
A D | cpcap-regulator.c | 338 CPCAP_REG(SW1, CPCAP_REG_S1C1, CPCAP_REG_ASSIGN2, 414 CPCAP_REG(SW1, CPCAP_REG_S1C1, CPCAP_REG_ASSIGN2,
|
A D | pv88060-regulator.c | 217 PV88060_SW(PV88060, SW1, 5000000),
|
A D | ltc3676.c | 225 LTC3676_LINEAR_REG(SW1, sw1, BUCK1, DVB1A),
|
A D | ltc3589.c | 257 LTC3589_LINEAR_REG(SW1, sw1, B1DTV1),
|
A D | mc13892-regulator.c | 267 MC13892_SW_DEFINE(SW1, sw1, SWITCHERS0, SWITCHERS0, mc13892_sw1),
|
A D | pfuze100-regulator.c | 422 PFUZE3000_SW_REG(PFUZE3001, SW1, PFUZE100_SW1ABVOL, 0x1f, pfuze3000_sw1a),
|
/linux/arch/arm/boot/dts/ |
A D | at91-kizbox3-hs.dts | 71 SW1 { 72 label = "SW1";
|
A D | r8a7742-iwg21d-q7-dbcm-ca.dts | 219 * Set SW1 switch on camera board to 'OFF' as we are using 8bit mode 251 /* Set SW1 switch on the SOM to 'ON' */
|
A D | imx53-qsrb.dts | 35 regulator-name = "SW1";
|
A D | r7s72100-rskrza1.dts | 42 label = "SW1";
|
A D | sh73a0-kzm9g.dts | 143 label = "SW1";
|
A D | r8a7794-silk.dts | 13 * SW1: 2-1: AK4643
|
A D | r8a7793-gose.dts | 11 * SW1: 1: AK4643
|
A D | at91-sam9x60ek.dts | 86 label = "SW1";
|
A D | r8a7790-lager.dts | 13 * SW1: 1: AK4643
|
/linux/include/linux/mfd/ |
A D | ezx-pcap.h | 130 #define SW1 17 macro
|
/linux/Documentation/devicetree/bindings/mfd/ |
A D | mc13xxx.txt | 86 sw1 : regulator SW1 (register 24, bit 0)
|
/linux/Documentation/networking/device_drivers/appletalk/ |
A D | ltpc.rst | 83 SW1 IRQ 4
|
/linux/arch/arm64/boot/dts/amlogic/ |
A D | meson-sm1-bananapi-m5.dts | 62 label = "SW1";
|
A D | meson-g12b-odroid-n2.dtsi | 605 * The SW1 slide should also be set to the correct position.
|
Completed in 35 milliseconds
12