Searched refs:SYS_CLKR (Results 1 – 7 of 7) sorted by relevance
| /linux/drivers/staging/rtl8712/ |
| A D | usb_halinit.c | 34 r8712_write8(adapter, SYS_CLKR, val8); in r8712_usb_hal_bus_init()
74 val8 = r8712_read8(adapter, SYS_CLKR + 1); in r8712_usb_hal_bus_init()
77 r8712_write8(adapter, SYS_CLKR + 1, val8); in r8712_usb_hal_bus_init()
85 val8 = r8712_read8(adapter, SYS_CLKR + 1); in r8712_usb_hal_bus_init()
88 r8712_write8(adapter, SYS_CLKR + 1, val8); in r8712_usb_hal_bus_init()
136 val8 = r8712_read8(adapter, SYS_CLKR); in r8712_usb_hal_bus_init()
139 val8 = r8712_read8(adapter, SYS_CLKR); in r8712_usb_hal_bus_init()
162 val8 = r8712_read8(adapter, SYS_CLKR); in r8712_usb_hal_bus_init()
230 r8712_write8(adapter, SYS_CLKR, 0x00); in r8712_usb_hal_bus_init()
234 val8 = r8712_read8(adapter, SYS_CLKR); in r8712_usb_hal_bus_init()
[all …]
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| A D | hal_init.c | 249 tmp8 = r8712_read8(adapter, SYS_CLKR); in rtl8712_dl_fw()
250 r8712_write8(adapter, SYS_CLKR, tmp8 | BIT(2)); in rtl8712_dl_fw()
251 tmp8_a = r8712_read8(adapter, SYS_CLKR); in rtl8712_dl_fw()
369 r8712_write8(padapter, SYS_CLKR + 1, 0x38); /* Switch Control Path */ in rtl8712_hal_deinit()
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| A D | rtl8712_syscfg_regdef.h | 21 #define SYS_CLKR (RTL8712_SYSCFG_ + 0x0008) macro
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| /linux/drivers/net/wireless/realtek/rtlwifi/rtl8192se/ |
| A D | hw.c | 452 rtl_write_byte(rtlpriv, SYS_CLKR + 1, data); in _rtl92se_halset_sysclk()
458 tmpvalue = rtl_read_byte(rtlpriv, SYS_CLKR + 1); in _rtl92se_halset_sysclk()
549 tmpu1b = rtl_read_byte(rtlpriv, (SYS_CLKR + 1)); in _rtl92se_macconfig_before_fwdownload()
638 tmpu2b = rtl_read_word(rtlpriv, SYS_CLKR); in _rtl92se_macconfig_before_fwdownload()
652 tmpu2b = rtl_read_word(rtlpriv, SYS_CLKR); in _rtl92se_macconfig_before_fwdownload()
1262 rtl_write_byte(rtlpriv, SYS_CLKR + 1, data); in _rtl92s_set_sysclk()
1268 tmp = rtl_read_byte(rtlpriv, SYS_CLKR + 1); in _rtl92s_set_sysclk()
1277 tmp = rtl_read_byte(rtlpriv, SYS_CLKR + 1); in _rtl92s_set_sysclk()
1361 rtl_write_byte(rtlpriv, SYS_CLKR + 1, 0x70); in _rtl92s_phy_set_rfhalt()
1475 tmpu2b = rtl_read_word(rtlpriv, SYS_CLKR); in _rtl92se_power_domain_init()
[all …]
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| A D | fw.c | 31 tmpu1b = rtl_read_byte(rtlpriv, SYS_CLKR); in _rtl92s_firmware_enable_cpu()
33 rtl_write_byte(rtlpriv, SYS_CLKR, (tmpu1b | SYS_CPU_CLKSEL)); in _rtl92s_firmware_enable_cpu()
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| A D | sw.c | 292 .maps[SYS_CLK] = SYS_CLKR,
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| A D | reg.h | 11 #define SYS_CLKR 0x0008 macro
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Completed in 22 milliseconds