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Searched refs:TEGRA20_CLK_PLL_A (Results 1 – 12 of 12) sorted by relevance

/linux/include/dt-bindings/clock/
A Dtegra20-car.h135 #define TEGRA20_CLK_PLL_A 112 macro
/linux/arch/arm/boot/dts/
A Dtegra20-plutux.dts57 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
A Dtegra20-tec.dts66 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
A Dtegra20-medcom-wide.dts89 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
A Dtegra20-trimslice.dts452 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
A Dtegra20-paz00.dts653 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
A Dtegra20-ventana.dts718 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
A Dtegra20-colibri.dtsi738 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
A Dtegra20-harmony.dts757 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
A Dtegra20-seaboard.dts916 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
A Dtegra20-acer-a500-picasso.dts1028 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
/linux/drivers/clk/tegra/
A Dclk-tegra20.c431 { .con_id = "pll_a", .dt_id = TEGRA20_CLK_PLL_A },
678 clks[TEGRA20_CLK_PLL_A] = clk; in tegra20_pll_init()
1035 { TEGRA20_CLK_PLL_A, TEGRA20_CLK_CLK_MAX, 56448000, 0 },

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