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Searched refs:TEGRA20_CLK_PLL_C_OUT1 (Results 1 – 2 of 2) sorted by relevance

/linux/include/dt-bindings/clock/
A Dtegra20-car.h138 #define TEGRA20_CLK_PLL_C_OUT1 115 macro
/linux/drivers/clk/tegra/
A Dclk-tegra20.c419 { .con_id = "pll_c_out1", .dt_id = TEGRA20_CLK_PLL_C_OUT1 },
639 clks[TEGRA20_CLK_PLL_C_OUT1] = clk; in tegra20_pll_init()
1024 { TEGRA20_CLK_PLL_C_OUT1, TEGRA20_CLK_CLK_MAX, 120000000, 0 },
1025 { TEGRA20_CLK_SCLK, TEGRA20_CLK_PLL_C_OUT1, 120000000, 0 },

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