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Searched refs:TEGRA20_CLK_PLL_P (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/clk/tegra/
A Dclk-tegra20.c420 { .con_id = "pll_p", .dt_id = TEGRA20_CLK_PLL_P },
1030 { TEGRA20_CLK_UARTA, TEGRA20_CLK_PLL_P, 0, 0 },
1031 { TEGRA20_CLK_UARTB, TEGRA20_CLK_PLL_P, 0, 0 },
1032 { TEGRA20_CLK_UARTC, TEGRA20_CLK_PLL_P, 0, 0 },
1033 { TEGRA20_CLK_UARTD, TEGRA20_CLK_PLL_P, 0, 0 },
1034 { TEGRA20_CLK_UARTE, TEGRA20_CLK_PLL_P, 0, 0 },
1042 { TEGRA20_CLK_SPI, TEGRA20_CLK_PLL_P, 20000000, 0 },
1043 { TEGRA20_CLK_SBC1, TEGRA20_CLK_PLL_P, 100000000, 0 },
1044 { TEGRA20_CLK_SBC2, TEGRA20_CLK_PLL_P, 100000000, 0 },
1045 { TEGRA20_CLK_SBC3, TEGRA20_CLK_PLL_P, 100000000, 0 },
[all …]
/linux/include/dt-bindings/clock/
A Dtegra20-car.h144 #define TEGRA20_CLK_PLL_P 121 macro
/linux/arch/arm/boot/dts/
A Dtegra20.dtsi109 <&tegra_car TEGRA20_CLK_PLL_P>;
137 <&tegra_car TEGRA20_CLK_PLL_P>;
/linux/Documentation/devicetree/bindings/display/tegra/
A Dnvidia,tegra20-host1x.txt546 <&tegra_car TEGRA20_CLK_PLL_P>;
570 <&tegra_car TEGRA20_CLK_PLL_P>;

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