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Searched refs:TO_DCN30_DPP (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dcn30/
A Ddcn30_dpp.c61 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp3_program_post_csc()
131 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp3_set_pre_degam()
179 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp3_cnv_setup()
354 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp3_set_cursor_attributes()
481 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp3_cnv_set_bias_scale()
495 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp3_deferred_update()
543 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp3_power_on_blnd_lut()
563 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp3_power_on_hdr3dlut()
580 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp3_power_on_shaper()
597 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp3_configure_blnd_lut()
[all …]
A Ddcn30_dpp_cm.c46 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp3_enable_cm_block()
62 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp30_get_gamcor_current()
90 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp3_program_gammcor_lut()
136 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp3_power_on_gamcor_lut()
155 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp3_program_cm_dealpha()
166 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp3_program_cm_bias()
211 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp3_configure_gamcor_lut()
226 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp3_program_gamcor_lut()
314 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp3_set_hdr_multiplier()
383 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp3_cm_set_gamut_remap()
A Ddcn30_dpp.h30 #define TO_DCN30_DPP(dpp)\ macro

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