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Searched refs:UIC_ARG_MIB (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/scsi/ufs/
A Dufshcd-dwc.c85 { UIC_ARG_MIB(N_DEVICEID), 0, DME_LOCAL }, in ufshcd_dwc_connection_setup()
87 { UIC_ARG_MIB(T_PEERDEVICEID), 1, DME_LOCAL }, in ufshcd_dwc_connection_setup()
88 { UIC_ARG_MIB(T_PEERCPORTID), 0, DME_LOCAL }, in ufshcd_dwc_connection_setup()
89 { UIC_ARG_MIB(T_TRAFFICCLASS), 0, DME_LOCAL }, in ufshcd_dwc_connection_setup()
91 { UIC_ARG_MIB(T_CPORTMODE), 1, DME_LOCAL }, in ufshcd_dwc_connection_setup()
94 { UIC_ARG_MIB(N_DEVICEID), 1, DME_PEER }, in ufshcd_dwc_connection_setup()
96 { UIC_ARG_MIB(T_PEERDEVICEID), 1, DME_PEER }, in ufshcd_dwc_connection_setup()
97 { UIC_ARG_MIB(T_PEERCPORTID), 0, DME_PEER }, in ufshcd_dwc_connection_setup()
98 { UIC_ARG_MIB(T_TRAFFICCLASS), 0, DME_PEER }, in ufshcd_dwc_connection_setup()
99 { UIC_ARG_MIB(T_CPORTFLAGS), 0x6, DME_PEER }, in ufshcd_dwc_connection_setup()
[all …]
A Dcdns-pltfrm.c40 ufshcd_dme_get(hba, UIC_ARG_MIB(T_PEERDEVICEID), in cdns_ufs_get_l4_attr()
42 ufshcd_dme_get(hba, UIC_ARG_MIB(T_PEERCPORTID), in cdns_ufs_get_l4_attr()
44 ufshcd_dme_get(hba, UIC_ARG_MIB(T_TRAFFICCLASS), in cdns_ufs_get_l4_attr()
46 ufshcd_dme_get(hba, UIC_ARG_MIB(T_PROTOCOLID), in cdns_ufs_get_l4_attr()
48 ufshcd_dme_get(hba, UIC_ARG_MIB(T_CPORTFLAGS), in cdns_ufs_get_l4_attr()
50 ufshcd_dme_get(hba, UIC_ARG_MIB(T_TXTOKENVALUE), in cdns_ufs_get_l4_attr()
52 ufshcd_dme_get(hba, UIC_ARG_MIB(T_RXTOKENVALUE), in cdns_ufs_get_l4_attr()
60 ufshcd_dme_get(hba, UIC_ARG_MIB(T_CPORTMODE), in cdns_ufs_get_l4_attr()
82 ufshcd_dme_set(hba, UIC_ARG_MIB(T_PROTOCOLID), in cdns_ufs_set_l4_attr()
84 ufshcd_dme_set(hba, UIC_ARG_MIB(T_CPORTFLAGS), in cdns_ufs_set_l4_attr()
[all …]
A Dtc-dwc-g210.c28 { UIC_ARG_MIB(REFCLKMODE), 0x01, DME_LOCAL }, in tc_dwc_g210_setup_40bit_rmmi()
29 { UIC_ARG_MIB(CDIRECTCTRL6), 0x80, DME_LOCAL }, in tc_dwc_g210_setup_40bit_rmmi()
30 { UIC_ARG_MIB(CBDIVFACTOR), 0x08, DME_LOCAL }, in tc_dwc_g210_setup_40bit_rmmi()
31 { UIC_ARG_MIB(CBDCOCTRL5), 0x64, DME_LOCAL }, in tc_dwc_g210_setup_40bit_rmmi()
32 { UIC_ARG_MIB(CBPRGTUNING), 0x09, DME_LOCAL }, in tc_dwc_g210_setup_40bit_rmmi()
33 { UIC_ARG_MIB(RTOBSERVESELECT), 0x00, DME_LOCAL }, in tc_dwc_g210_setup_40bit_rmmi()
50 { UIC_ARG_MIB(DIRECTCTRL10), 0x04, DME_LOCAL }, in tc_dwc_g210_setup_40bit_rmmi()
51 { UIC_ARG_MIB(DIRECTCTRL19), 0x02, DME_LOCAL }, in tc_dwc_g210_setup_40bit_rmmi()
74 { UIC_ARG_MIB(CBPRGPLL2), 0x00, DME_LOCAL }, in tc_dwc_g210_setup_40bit_rmmi()
127 { UIC_ARG_MIB(CBPRGPLL2), 0x00, DME_LOCAL }, in tc_dwc_g210_setup_20bit_rmmi_lane0()
[all …]
A Dufs-hisi.c255 ufshcd_dme_set(hba, UIC_ARG_MIB(0x2044), 0x0); in ufs_hisi_link_startup_post_change()
257 ufshcd_dme_set(hba, UIC_ARG_MIB(0x2045), 0x0); in ufs_hisi_link_startup_post_change()
259 ufshcd_dme_set(hba, UIC_ARG_MIB(0x2040), 0x9); in ufs_hisi_link_startup_post_change()
326 ufshcd_dme_set(hba, UIC_ARG_MIB(0xD0A0), 0x10); in ufs_hisi_pwr_change_pre_change()
328 ufshcd_dme_set(hba, UIC_ARG_MIB(0x1556), 0x48); in ufs_hisi_pwr_change_pre_change()
332 ufshcd_dme_set(hba, UIC_ARG_MIB(0x15A8), 0x1); in ufs_hisi_pwr_change_pre_change()
334 ufshcd_dme_set(hba, UIC_ARG_MIB(0x155c), 0x0); in ufs_hisi_pwr_change_pre_change()
336 ufshcd_dme_set(hba, UIC_ARG_MIB(0x15b0), 8191); in ufs_hisi_pwr_change_pre_change()
342 ufshcd_dme_set(hba, UIC_ARG_MIB(0xd041), 8191); in ufs_hisi_pwr_change_pre_change()
348 ufshcd_dme_set(hba, UIC_ARG_MIB(0x15b3), 8191); in ufs_hisi_pwr_change_pre_change()
[all …]
A Dufs-exynos.c240 ufshcd_dme_set(hba, UIC_ARG_MIB(0x200), 0x40); in exynosauto_ufs_pre_link()
276 ufshcd_dme_set(hba, UIC_ARG_MIB(0x200), 0x0); in exynosauto_ufs_pre_link()
280 ufshcd_dme_set(hba, UIC_ARG_MIB(0xa011), 0x8000); in exynosauto_ufs_pre_link()
706 ufshcd_dme_set(hba, UIC_ARG_MIB(N_DEVICEID), DEV_ID); in exynos_ufs_establish_connt()
927 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_DBG_CLK_PERIOD), in exynos_ufs_config_unipro()
1031 UIC_ARG_MIB(T_DBG_SKIP_INIT_HIBERN8_EXIT), TRUE); in exynos_ufs_post_link()
1035 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_GRANULARITY), in exynos_ufs_post_link()
1040 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), in exynos_ufs_post_link()
1044 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME), in exynos_ufs_post_link()
1050 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_GRANULARITY), in exynos_ufs_post_link()
[all …]
A Dufs-mediatek.c87 UIC_ARG_MIB(VS_SAVEPOWERCONTROL), &tmp); in ufs_mtk_cfg_unipro_cg()
93 UIC_ARG_MIB(VS_SAVEPOWERCONTROL), tmp); in ufs_mtk_cfg_unipro_cg()
96 UIC_ARG_MIB(VS_DEBUGCLOCKENABLE), &tmp); in ufs_mtk_cfg_unipro_cg()
99 UIC_ARG_MIB(VS_DEBUGCLOCKENABLE), tmp); in ufs_mtk_cfg_unipro_cg()
102 UIC_ARG_MIB(VS_SAVEPOWERCONTROL), &tmp); in ufs_mtk_cfg_unipro_cg()
107 UIC_ARG_MIB(VS_SAVEPOWERCONTROL), tmp); in ufs_mtk_cfg_unipro_cg()
110 UIC_ARG_MIB(VS_DEBUGCLOCKENABLE), &tmp); in ufs_mtk_cfg_unipro_cg()
113 UIC_ARG_MIB(VS_DEBUGCLOCKENABLE), tmp); in ufs_mtk_cfg_unipro_cg()
660 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_LOCALVERINFO), &ver); in ufs_mtk_get_controller_version()
856 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(VS_SAVEPOWERCONTROL), tmp); in ufs_mtk_pre_link()
[all …]
A Dufs-exynos.h251 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_DBG_OV_TM), TRUE); in exynos_ufs_enable_ov_tm()
256 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_DBG_OV_TM), FALSE); in exynos_ufs_disable_ov_tm()
261 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_DBG_MODE), TRUE); in exynos_ufs_enable_dbg_mode()
266 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_DBG_MODE), FALSE); in exynos_ufs_disable_dbg_mode()
A Dufshcd-pci.c103 u32 attr = UIC_ARG_MIB(PA_LOCAL_TX_LCC_ENABLE); in ufs_intel_disable_lcc()
164 err = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_GRANULARITY), in ufs_intel_lkf_pwr_change_notify()
181 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_GRANULARITY), &granularity); in ufs_intel_lkf_apply_dev_quirks()
185 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_GRANULARITY), &peer_granularity); in ufs_intel_lkf_apply_dev_quirks()
189 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_TACTIVATE), &pa_tactivate); in ufs_intel_lkf_apply_dev_quirks()
193 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_TACTIVATE), &peer_pa_tactivate); in ufs_intel_lkf_apply_dev_quirks()
200 ret = ufshcd_dme_peer_set(hba, UIC_ARG_MIB(PA_TACTIVATE), new_peer_pa_tactivate); in ufs_intel_lkf_apply_dev_quirks()
A Dufs-qcom.c62 UIC_ARG_MIB(PA_CONNECTEDTXDATALANES), tx_lanes); in ufs_qcom_get_connected_tx_lanes()
795 err = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_VS_CONFIG_REG1), in ufs_qcom_quirk_host_pa_saveconfigtime()
801 err = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_VS_CONFIG_REG1), in ufs_qcom_quirk_host_pa_saveconfigtime()
1140 UIC_ARG_MIB(DME_VS_CORE_CLK_CTRL), in ufs_qcom_set_dme_vs_core_clk_ctrl_clear_div()
1152 UIC_ARG_MIB(DME_VS_CORE_CLK_CTRL), in ufs_qcom_set_dme_vs_core_clk_ctrl_clear_div()
1185 UIC_ARG_MIB(DME_VS_CORE_CLK_CTRL), in ufs_qcom_clk_scale_down_pre_change()
1193 UIC_ARG_MIB(DME_VS_CORE_CLK_CTRL), in ufs_qcom_clk_scale_down_pre_change()
A Dufshcd.c3771 UIC_ARG_MIB(PA_TXHSADAPTTYPE), in ufshcd_dme_configure_adapt()
4072 uic_cmd.argument1 = UIC_ARG_MIB(PA_PWRMODE); in ufshcd_uic_change_pwr_mode()
4252 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR), in ufshcd_get_max_pwr_mode()
4262 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), in ufshcd_get_max_pwr_mode()
4304 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVERXDATALANES), in ufshcd_change_power_mode()
4313 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVETXDATALANES), in ufshcd_change_power_mode()
4325 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES), in ufshcd_change_power_mode()
4329 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA0), in ufshcd_change_power_mode()
6056 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_PWRMODE), &mode); in ufshcd_is_pwr_mode_restore_needed()
7684 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), in ufshcd_tune_pa_tactivate()
[all …]
A Dufshci.h244 #define UIC_ARG_MIB(attr) UIC_ARG_MIB_SEL(attr, 0) macro
A Dufshcd.h1164 return ufshcd_dme_set(hba, UIC_ARG_MIB(PA_LOCAL_TX_LCC_ENABLE), 0); in ufshcd_disable_host_tx_lcc()

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