Home
last modified time | relevance | path

Searched refs:UTSR1_TBY (Results 1 – 3 of 3) sorted by relevance

/linux/arch/arm/include/debug/
A Dsa1100.S14 #define UTSR1_TBY 0x00000001 /* Transmitter BusY (read) */ macro
65 tst \rd, #UTSR1_TBY
/linux/drivers/tty/serial/
A Dsa1100.c317 return UART_GET_UTSR1(sport) & UTSR1_TBY ? 0 : TIOCSER_TEMT; in sa1100_tx_empty()
492 while (UART_GET_UTSR1(sport) & UTSR1_TBY) in sa1100_set_termios()
732 } while (status & UTSR1_TBY); in sa1100_console_write()
/linux/arch/arm/mach-sa1100/include/mach/
A DSA-1100.h394 #define UTSR1_TBY 0x00000001 /* Transmitter BusY (read) */ macro

Completed in 6089 milliseconds