Searched refs:VECS0 (Results 1 – 17 of 17) sorted by relevance
/linux/drivers/gpu/drm/i915/ |
A D | i915_pci.c | 600 BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1), 665 BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1) 747 BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1), 768 BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1), 825 BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2), 876 BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2), 889 BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0), 907 BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | 920 BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2), 1021 BIT(VECS0) | BIT(VECS1) | BIT(VECS2) | BIT(VECS3) | [all …]
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A D | i915_drv.h | 1622 ENGINE_INSTANCES_MASK(gt, VECS0, I915_MAX_VECS)
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A D | i915_gpu_error.c | 1208 case VECS0: in engine_record_registers()
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/linux/drivers/gpu/drm/i915/gvt/ |
A D | mmio_context.c | 132 {VECS0, RING_EXCC(VEBOX_RING_BASE), 0xffff, false}, /* 0x1a028 */ 160 [VECS0] = 0xcb00, 347 [VECS0] = 0x4270, 404 [VECS0] = 0xcb00, in switch_mocs()
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A D | execlist.c | 53 [VECS0] = VECS_AS_CONTEXT_SWITCH,
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A D | cmd_parser.c | 426 #define R_VECS BIT(VECS0) 626 [VECS0] = { 1168 [VECS0] = {
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A D | handlers.c | 341 engine_mask |= BIT(VECS0); in gdrst_mmio_write() 2091 id = VECS0; in gvt_reg_tlb_control_handler()
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/linux/drivers/gpu/drm/i915/gt/ |
A D | intel_engine_types.h | 115 VECS0, enumerator 119 #define _VECS(n) (VECS0 + (n))
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A D | intel_engine_user.c | 164 [VIDEO_ENHANCEMENT_CLASS] = { VECS0, I915_MAX_VECS }, in legacy_ring_idx()
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A D | intel_gt_irq.c | 450 if (HAS_ENGINE(gt, VECS0)) { in gen5_gt_irq_postinstall()
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A D | intel_mocs.c | 543 [VECS0] = __GEN9_VECS0_MOCS0, in mocs_offset()
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A D | intel_reset.c | 305 [VECS0] = GEN6_GRDOM_VECS, in gen6_reset_engines() 506 [VECS0] = GEN11_GRDOM_VECS, in gen11_reset_engines()
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A D | intel_ring_submission.c | 94 case VECS0: in set_hwsp()
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A D | intel_engine_cs.c | 127 [VECS0] = {
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A D | intel_rps.c | 1796 intel_engine_cs_irq(gt->engine[VECS0], pm_iir >> 10); in gen6_rps_irq_handler()
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A D | intel_execlists_submission.c | 3364 [VECS0] = GEN8_VECS_IRQ_SHIFT, in logical_ring_default_irqs()
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/linux/drivers/gpu/drm/i915/gem/ |
A D | i915_gem_execbuffer.c | 2307 [I915_EXEC_VEBOX] = VECS0
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