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Searched refs:VIACR (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/video/fbdev/via/
A Dviamode.c19 {VIACR, CR32, 0xFF, 0x00},
20 {VIACR, CR33, 0xFF, 0x00},
21 {VIACR, CR35, 0xFF, 0x00},
22 {VIACR, CR36, 0x08, 0x00},
23 {VIACR, CR69, 0xFF, 0x00},
24 {VIACR, CR6A, 0xFF, 0x40},
25 {VIACR, CR6B, 0xFF, 0x00},
36 {VIACR, CR96, 0xFF, 0x00},
37 {VIACR, CR97, 0xFF, 0x00},
38 {VIACR, CR99, 0xFF, 0x00},
[all …]
A Dvia_modesetting.c36 via_write_reg_mask(VIACR, 0x11, 0x00, 0x80); in via_set_primary_timing()
38 via_write_reg(VIACR, 0x00, raw.hor_total & 0xFF); in via_set_primary_timing()
39 via_write_reg(VIACR, 0x01, raw.hor_addr & 0xFF); in via_set_primary_timing()
57 via_write_reg(VIACR, 0x12, raw.ver_addr & 0xFF); in via_set_primary_timing()
69 via_write_reg_mask(VIACR, 0x11, 0x80, 0x80); in via_set_primary_timing()
72 via_write_reg_mask(VIACR, 0x17, 0x00, 0x80); in via_set_primary_timing()
73 via_write_reg_mask(VIACR, 0x17, 0x80, 0x80); in via_set_primary_timing()
124 via_write_reg(VIACR, 0x0D, addr & 0xFF); in via_set_primary_address()
147 via_write_reg(VIACR, 0x13, pitch & 0xFF); in via_set_primary_pitch()
155 via_write_reg(VIACR, 0x66, pitch & 0xFF); in via_set_secondary_pitch()
[all …]
A Ddvi.c193 RegCR6B = viafb_read_reg(VIACR, CR6B); in viafb_dvi_sense()
198 RegCR91 = viafb_read_reg(VIACR, CR91); in viafb_dvi_sense()
199 viafb_write_reg(CR91, VIACR, 0x1D); in viafb_dvi_sense()
205 RegCR93 = viafb_read_reg(VIACR, CR93); in viafb_dvi_sense()
206 viafb_write_reg(CR93, VIACR, 0x01); in viafb_dvi_sense()
219 RegCR91 = viafb_read_reg(VIACR, CR91); in viafb_dvi_sense()
220 viafb_write_reg(CR91, VIACR, 0x1D); in viafb_dvi_sense()
225 viafb_write_reg(CR9B, VIACR, 0x01); in viafb_dvi_sense()
239 viafb_write_reg(CR91, VIACR, RegCR91); in viafb_dvi_sense()
318 viafb_write_reg(CRD2, VIACR, in viafb_dvi_disable()
[all …]
A Dlcd.c175 viafb_read_reg(VIACR, CR3F) & 0x0F; in fp_id_to_vindex()
360 viafb_load_reg_num, reg, VIACR); in load_lcd_scaling()
381 viafb_load_reg_num, reg, VIACR); in load_lcd_scaling()
404 viafb_load_reg_num, reg, VIACR); in load_lcd_scaling()
425 viafb_load_reg_num, reg, VIACR); in load_lcd_scaling()
448 viafb_write_reg(CR66, VIACR, cr66); in via_pitch_alignment_patch_lcd()
453 viafb_write_reg(CR67, VIACR, cr67); in via_pitch_alignment_patch_lcd()
459 viafb_write_reg(CR67, VIACR, cr67); in via_pitch_alignment_patch_lcd()
462 viafb_write_reg(CR65, VIACR, cr65); in via_pitch_alignment_patch_lcd()
466 viafb_write_reg(CR13, VIACR, cr13); in via_pitch_alignment_patch_lcd()
[all …]
A Dhw.c992 if (io_type == VIACR) in viafb_load_reg()
1320 viafb_load_reg_num, reg, VIACR); in viafb_load_FIFO_reg()
1333 viafb_load_reg_num, reg, VIACR); in viafb_load_FIFO_reg()
1537 tmp = viafb_read_reg(VIACR, CR4F); in init_gfx_chip_info()
1546 viafb_write_reg(CR4F, VIACR, tmp); in init_gfx_chip_info()
1678 tmp = viafb_read_reg(VIACR, CR6A); in viafb_init_dac()
1689 viafb_write_reg(CR6A, VIACR, tmp); in viafb_init_dac()
1890 viafb_write_reg(CR02, VIACR, in viafb_setmode()
2053 viafb_write_reg_mask(CR96, VIACR, in viafb_set_dpa_gfx()
2072 viafb_write_reg_mask(CR9B, VIACR, in viafb_set_dpa_gfx()
[all …]
A Dvia_utility.c148 viafb_write_reg_mask(CR33, VIACR, 0x80, BIT7); in viafb_set_gamma_table()
170 viafb_write_reg_mask(CR6A, VIACR, 0x02, BIT1); in viafb_set_gamma_table()
203 viafb_write_reg_mask(CR33, VIACR, 0x80, BIT7); in viafb_get_gamma_table()
A Dvia_clock.c249 via_write_reg_mask(VIACR, 0x6C, data, 0xF0); in set_primary_clock_source()
255 via_write_reg_mask(VIACR, 0x6C, data, 0x0F); in set_secondary_clock_source()
A Dviafbdev.c1119 dvp0 = viafb_read_reg(VIACR, CR96) & 0x0f; in viafb_dvp0_proc_show()
1151 viafb_write_reg_mask(CR96, VIACR, in viafb_dvp0_proc_write()
1187 dvp1 = viafb_read_reg(VIACR, CR9B) & 0x0f; in viafb_dvp1_proc_show()
1219 viafb_write_reg_mask(CR9B, VIACR, in viafb_dvp1_proc_write()
1251 dfp_high = viafb_read_reg(VIACR, CR97) & 0x0f; in viafb_dfph_proc_show()
1270 viafb_write_reg_mask(CR97, VIACR, reg_val, 0x0f); in viafb_dfph_proc_write()
1285 dfp_low = viafb_read_reg(VIACR, CR99) & 0x0f; in viafb_dfpl_proc_show()
1304 viafb_write_reg_mask(CR99, VIACR, reg_val, 0x0f); in viafb_dfpl_proc_write()
/linux/include/linux/
A Dvia-core.h183 #define VIACR 0x3D4 macro

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