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Searched refs:VSYNC (Results 1 – 25 of 38) sorted by relevance

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/linux/Documentation/devicetree/bindings/media/
A Drenesas,vin.yaml87 If both HSYNC and VSYNC polarities are not specified, embedded
93 If both HSYNC and VSYNC polarities are not specified, embedded
136 If both HSYNC and VSYNC polarities are not specified, embedded
142 If both HSYNC and VSYNC polarities are not specified, embedded
A Dvideo-interfaces.yaml123 Active state of the VSYNC signal, 0/1 for LOW/HIGH respectively. Note,
124 that if HSYNC and VSYNC polarities are not specified, embedded
131 Similar to HSYNC and VSYNC, specifies data line polarity.
137 Similar to HSYNC and VSYNC, specifies the data enable signal polarity.
/linux/drivers/gpu/drm/nouveau/dispnv50/
A Ddac507d.c38 sync |= NVVAL(NV507D, DAC_SET_POLARITY, VSYNC, asyh->or.nvsync); in dac507d_ctrl()
/linux/drivers/gpu/drm/bridge/
A Dchipone-icn6211.c27 #define VSYNC 0x28 macro
93 ICN6211_DSI(icn, VSYNC, mode->vsync_end - mode->vsync_start); in chipone_enable()
/linux/Documentation/devicetree/bindings/media/i2c/
A Dtvp514x.txt19 - vsync-active: VSYNC Polarity configuration for endpoint.
A Dtvp7002.txt13 - vsync-active: VSYNC Polarity configuration for the bus. Default value when
A Dov7670.txt14 - vsync-active: active state of the VSYNC signal, 0/1 for LOW/HIGH respectively.
A Dst,st-mipid02.txt47 - vsync-active: active state of the VSYNC signal, 0/1 for LOW/HIGH respectively.
A Dtvp5150.txt45 - vsync-active: Active state of the VSYNC signal. Must be <1> (HIGH).
/linux/Documentation/fb/
A Dpxafb.rst45 vsynclen:VSYNC == LCCR2_VSW + 1
65 hsync:HSYNC, vsync:VSYNC
A Dmatroxfb.rst265 upper:X top boundary: lines between end of VSYNC pulse and start of first
267 lower:X bottom boundary: lines between end of picture and start of VSYNC
269 vslen:X length of VSYNC pulse, in lines. Default is derived from `vesa`
279 sync:X sync. pulse - bit 0 inverts HSYNC polarity, bit 1 VSYNC polarity.
/linux/drivers/video/fbdev/i810/
A Di810_regs.h153 #define VSYNC 0x60014 macro
/linux/Documentation/devicetree/bindings/display/exynos/
A Dexynos7-decon.txt13 order: FIFO Level, VSYNC, LCD_SYSTEM. The interrupt specifier
A Dexynos_dp.txt38 VSYNC polarity configuration.
A Dsamsung-fimd.txt20 order: FIFO Level, VSYNC, LCD_SYSTEM. The interrupt specifier
/linux/Documentation/devicetree/bindings/display/rockchip/
A Drockchip-vop.yaml49 frame start (VSYNC), line flag and other status interrupts.
/linux/include/video/
A Dsstfb.h162 #define VSYNC 0x0224 macro
/linux/arch/arm/boot/dts/
A Dam437x-sbc-t43.dts59 AM4372_IOPAD(0x8e0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS VSYNC */
A Dimx53-qsb-common.dtsi297 /* VGA_HSYNC, VSYNC with max drive strength */
A Dimx6ul-tx6ul-mainboard.dts206 MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x10 /* VSYNC */
A Dimx6ul-tx6ul.dtsi624 MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x10 /* VSYNC */
657 MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x10 /* VSYNC */
A Dimx6qdl-kontron-samx6i.dtsi589 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x100f1 /* VSYNC */
/linux/Documentation/userspace-api/media/drivers/
A Dimx-uapi.rst94 Input capture requires hardware support. A VSYNC signal must be routed
/linux/drivers/video/fbdev/omap2/omapfb/dss/
A Ddispc-compat.c81 PIS(VSYNC); in dispc_dump_irqs()
/linux/drivers/gpu/drm/i2c/
A Dch7006_mode.c123 DRM_MODE_FLAG_##vsynp##VSYNC, \

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