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Searched refs:X1CLK (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/net/hamradio/
A Dz8530.h82 #define X1CLK 0x0 /* x1 clock mode */ macro
A Ddmascc.c752 write_scc(priv, R4, SDLC | X1CLK); in scc_open()
A Dscc.c801 wr(scc,R4,X1CLK|SDLC); /* *1 clock, SDLC mode */ in init_channel()
/linux/drivers/tty/serial/
A Dzs.h135 #define X1CLK 0x0 /* x1 clock mode */ macro
A Dsunzilog.h108 #define X1CLK 0x0 /* x1 clock mode */ macro
A Dip22zilog.h116 #define X1CLK 0x0 /* x1 clock mode */ macro
A Dpmac_zilog.h206 #define X1CLK 0x0 /* x1 clock mode */ macro
A Dpmac_zilog.c793 write_zsreg(uap, 4, X1CLK | MONSYNC); in pmz_fix_zero_bug_scc()
1007 uap->curregs[R4] = X1CLK; in pmz_convert_to_zs()
A Dzs.c905 zport->regs[4] |= X1CLK; in zs_set_termios()
/linux/drivers/net/wan/
A Dz85230.h103 #define X1CLK 0x0 /* x1 clock mode */ macro
A Dz85230.c200 4, SYNC_ENAB | SDLC | X1CLK,
222 4, SYNC_ENAB | SDLC | X1CLK,

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