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Searched refs:_ULCAST_ (Results 1 – 4 of 4) sorted by relevance

/linux/arch/mips/include/asm/
A Dmipsregs.h37 #define _ULCAST_ macro
40 #define _ULCAST_ (unsigned long) macro
272 #define IE_SW0 (_ULCAST_(1) << 8)
273 #define IE_SW1 (_ULCAST_(1) << 9)
284 #define C_SW0 (_ULCAST_(1) << 8)
285 #define C_SW1 (_ULCAST_(1) << 9)
286 #define C_IRQ0 (_ULCAST_(1) << 10)
287 #define C_IRQ1 (_ULCAST_(1) << 11)
288 #define C_IRQ2 (_ULCAST_(1) << 12)
289 #define C_IRQ3 (_ULCAST_(1) << 13)
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A Dmipsmtregs.h75 #define MVPCONTROL_EVP (_ULCAST_(1))
86 #define MVPCONF0_PTC ( _ULCAST_(0xff))
96 #define MVPCONF0_M (_ULCAST_(0x1) << MVPCONF0_M_SHIFT)
101 #define CONFIG3_MT (_ULCAST_(1) << CONFIG3_MT_SHIFT)
105 #define VPECONTROL_TARGTC (_ULCAST_(0xff))
142 #define TCSTATUS_TASID (_ULCAST_(0xff))
148 #define TCSTATUS_A (_ULCAST_(1) << TCSTATUS_A_SHIFT)
150 #define TCSTATUS_DA (_ULCAST_(1) << TCSTATUS_DA_SHIFT)
152 #define TCSTATUS_DT (_ULCAST_(1) << TCSTATUS_DT_SHIFT)
171 #define TCBIND_CURVPE (_ULCAST_(0xf))
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A Dmsa.h234 #define MSA_IR_REVF (_ULCAST_(0xff) << MSA_IR_REVB)
236 #define MSA_IR_PROCF (_ULCAST_(0xff) << MSA_IR_PROCB)
238 #define MSA_IR_WRPF (_ULCAST_(0x1) << MSA_IR_WRPB)
242 #define MSA_CSR_RMF (_ULCAST_(0x3) << MSA_CSR_RMB)
248 #define MSA_CSR_FLAGSF (_ULCAST_(0x1f) << MSA_CSR_FLAGSB)
250 #define MSA_CSR_FLAGS_IF (_ULCAST_(0x1) << MSA_CSR_FLAGS_IB)
252 #define MSA_CSR_FLAGS_UF (_ULCAST_(0x1) << MSA_CSR_FLAGS_UB)
254 #define MSA_CSR_FLAGS_OF (_ULCAST_(0x1) << MSA_CSR_FLAGS_OB)
272 #define MSA_CSR_CAUSEF (_ULCAST_(0x3f) << MSA_CSR_CAUSEB)
286 #define MSA_CSR_NXF (_ULCAST_(0x1) << MSA_CSR_NXB)
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/linux/arch/mips/kvm/
A Dinterrupt.h32 #define C_TI (_ULCAST_(1) << 30)

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