Searched refs:__vcpu_sys_reg (Results 1 – 10 of 10) sorted by relevance
| /linux/arch/arm64/kvm/ |
| A D | pmu-emul.c | 137 counter = __vcpu_sys_reg(vcpu, reg); in kvm_pmu_get_pair_counter_value()
138 counter_high = __vcpu_sys_reg(vcpu, reg + 1); in kvm_pmu_get_pair_counter_value()
144 counter = __vcpu_sys_reg(vcpu, reg); in kvm_pmu_get_pair_counter_value()
236 __vcpu_sys_reg(vcpu, reg) = val; in kvm_pmu_stop_counter()
373 reg = __vcpu_sys_reg(vcpu, PMOVSSET_EL0); in kvm_pmu_overflow_status()
374 reg &= __vcpu_sys_reg(vcpu, PMCNTENSET_EL0); in kvm_pmu_overflow_status()
375 reg &= __vcpu_sys_reg(vcpu, PMINTENSET_EL1); in kvm_pmu_overflow_status()
523 val &= __vcpu_sys_reg(vcpu, PMCNTENSET_EL0); in kvm_pmu_software_increment()
570 __vcpu_sys_reg(vcpu, PMCNTENSET_EL0)); in kvm_pmu_handle_pmcr()
615 data = __vcpu_sys_reg(vcpu, reg); in kvm_pmu_create_perf_event()
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| A D | sys_regs.c | 75 return __vcpu_sys_reg(vcpu, reg); in vcpu_read_sys_reg()
84 __vcpu_sys_reg(vcpu, reg) = val; in vcpu_write_sys_reg()
616 __vcpu_sys_reg(vcpu, r->reg) &= mask; in reset_pmu_reg()
654 __vcpu_sys_reg(vcpu, r->reg) = val; in reset_pmcr()
698 val = __vcpu_sys_reg(vcpu, PMCR_EL0); in access_pmcr()
703 __vcpu_sys_reg(vcpu, PMCR_EL0) = val; in access_pmcr()
708 val = __vcpu_sys_reg(vcpu, PMCR_EL0) in access_pmcr()
726 p->regval = __vcpu_sys_reg(vcpu, PMSELR_EL0) in access_pmselr()
757 pmcr = __vcpu_sys_reg(vcpu, PMCR_EL0); in pmu_counter_idx_valid()
779 idx = __vcpu_sys_reg(vcpu, PMSELR_EL0) in access_pmu_evcntr()
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| A D | arch_timer.c | 61 return __vcpu_sys_reg(vcpu, CNTV_CTL_EL0); in timer_get_ctl()
63 return __vcpu_sys_reg(vcpu, CNTP_CTL_EL0); in timer_get_ctl()
76 return __vcpu_sys_reg(vcpu, CNTV_CVAL_EL0); in timer_get_cval()
78 return __vcpu_sys_reg(vcpu, CNTP_CVAL_EL0); in timer_get_cval()
91 return __vcpu_sys_reg(vcpu, CNTVOFF_EL2); in timer_get_offset()
103 __vcpu_sys_reg(vcpu, CNTV_CTL_EL0) = ctl; in timer_set_ctl()
106 __vcpu_sys_reg(vcpu, CNTP_CTL_EL0) = ctl; in timer_set_ctl()
119 __vcpu_sys_reg(vcpu, CNTV_CVAL_EL0) = cval; in timer_set_cval()
122 __vcpu_sys_reg(vcpu, CNTP_CVAL_EL0) = cval; in timer_set_cval()
135 __vcpu_sys_reg(vcpu, CNTVOFF_EL2) = offset; in timer_set_offset()
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| A D | sys_regs.h | 122 __vcpu_sys_reg(vcpu, r->reg) = 0x1de7ec7edbadc0deULL; in reset_unknown()
129 __vcpu_sys_reg(vcpu, r->reg) = r->val; in reset_val()
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| A D | fpsimd.c | 125 __vcpu_sys_reg(vcpu, ZCR_EL1) = read_sysreg_el1(SYS_ZCR); in kvm_arch_vcpu_put_fp()
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| A D | arm.c | 715 __vcpu_sys_reg(vcpu, PMCR_EL0)); in check_vcpu_requests()
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| /linux/arch/arm64/kvm/hyp/include/hyp/ |
| A D | sysreg-sr.h | 195 __vcpu_sys_reg(vcpu, DACR32_EL2) = read_sysreg(dacr32_el2); in __sysreg32_save_state()
196 __vcpu_sys_reg(vcpu, IFSR32_EL2) = read_sysreg(ifsr32_el2); in __sysreg32_save_state()
199 __vcpu_sys_reg(vcpu, DBGVCR32_EL2) = read_sysreg(dbgvcr32_el2); in __sysreg32_save_state()
212 write_sysreg(__vcpu_sys_reg(vcpu, DACR32_EL2), dacr32_el2); in __sysreg32_restore_state()
213 write_sysreg(__vcpu_sys_reg(vcpu, IFSR32_EL2), ifsr32_el2); in __sysreg32_restore_state()
216 write_sysreg(__vcpu_sys_reg(vcpu, DBGVCR32_EL2), dbgvcr32_el2); in __sysreg32_restore_state()
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| A D | switch.h | 65 __vcpu_sys_reg(vcpu, FPEXC32_EL2) = read_sysreg(fpexc32_el2); in __fpsimd_save_fpexc32()
161 write_sysreg_el1(__vcpu_sys_reg(vcpu, ZCR_EL1), SYS_ZCR); in __hyp_sve_restore_guest()
225 write_sysreg(__vcpu_sys_reg(vcpu, FPEXC32_EL2), fpexc32_el2); in kvm_hyp_handle_fpsimd()
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| /linux/arch/arm64/kvm/hyp/ |
| A D | exception.c | 28 return __vcpu_sys_reg(vcpu, reg); in __vcpu_read_sys_reg()
36 __vcpu_sys_reg(vcpu, reg) = val; in __vcpu_write_sys_reg()
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| /linux/arch/arm64/include/asm/ |
| A D | kvm_host.h | 476 #define __vcpu_sys_reg(v,r) (ctxt_sys_reg(&(v)->arch.ctxt, (r))) macro
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