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/linux/drivers/net/ethernet/intel/ice/
A Dice_ptp.h159 #define GLTSYN_AUX_OUT(_chan, _idx) (GLTSYN_AUX_OUT_0(_idx) + ((_chan) * 8)) argument
160 #define GLTSYN_AUX_IN(_chan, _idx) (GLTSYN_AUX_IN_0(_idx) + ((_chan) * 8)) argument
161 #define GLTSYN_CLKO(_chan, _idx) (GLTSYN_CLKO_0(_idx) + ((_chan) * 8)) argument
162 #define GLTSYN_TGT_L(_chan, _idx) (GLTSYN_TGT_L_0(_idx) + ((_chan) * 16)) argument
163 #define GLTSYN_TGT_H(_chan, _idx) (GLTSYN_TGT_H_0(_idx) + ((_chan) * 16)) argument
164 #define GLTSYN_EVNT_L(_chan, _idx) (GLTSYN_EVNT_L_0(_idx) + ((_chan) * 16)) argument
165 #define GLTSYN_EVNT_H(_chan, _idx) (GLTSYN_EVNT_H_0(_idx) + ((_chan) * 16)) argument
/linux/include/linux/
A Dgeneric-radix-tree.h119 #define __genradix_idx_to_offset(_radix, _idx) \ argument
120 __idx_to_offset(_idx, __genradix_obj_size(_radix))
131 #define genradix_ptr(_radix, _idx) \ argument
134 __genradix_idx_to_offset(_radix, _idx)))
147 #define genradix_ptr_alloc(_radix, _idx, _gfp) \ argument
150 __genradix_idx_to_offset(_radix, _idx), \
163 #define genradix_iter_init(_radix, _idx) \ argument
165 .pos = (_idx), \
166 .offset = __genradix_idx_to_offset((_radix), (_idx)),\
/linux/tools/perf/tests/
A Dfdarray.c102 #define FDA_CHECK(_idx, _fd, _revents) \ in test__fdarray__add() argument
103 if (fda->entries[_idx].fd != _fd) { \ in test__fdarray__add()
105 __LINE__, _idx, fda->entries[1].fd, _fd); \ in test__fdarray__add()
108 if (fda->entries[_idx].events != (_revents)) { \ in test__fdarray__add()
110 __LINE__, _idx, fda->entries[_idx].fd, _revents); \ in test__fdarray__add()
114 #define FDA_ADD(_idx, _fd, _revents, _nr) \ in test__fdarray__add() argument
125 FDA_CHECK(_idx, _fd, _revents) in test__fdarray__add()
/linux/drivers/clk/uniphier/
A Dclk-uniphier.h69 #define UNIPHIER_CLK_CPUGEAR(_name, _idx, _regbase, _mask, \ argument
74 .idx = (_idx), \
83 #define UNIPHIER_CLK_FACTOR(_name, _idx, _parent, _mult, _div) \ argument
87 .idx = (_idx), \
95 #define UNIPHIER_CLK_GATE(_name, _idx, _parent, _reg, _bit) \ argument
99 .idx = (_idx), \
A Dclk-uniphier-mio.c21 #define UNIPHIER_MIO_CLK_SD(_idx, ch) \ argument
61 UNIPHIER_CLK_GATE("sd" #ch, (_idx), "sd" #ch "-sel", 0x20 + 0x200 * (ch), 8)
/linux/include/rdma/
A Duverbs_ioctl.h946 #define uverbs_get_const_signed(_to, _attrs_bundle, _idx) \ argument
950 _uverbs_get_const_signed(&_val, _attrs_bundle, _idx, \
957 #define uverbs_get_const_unsigned(_to, _attrs_bundle, _idx) \ argument
961 _uverbs_get_const_unsigned(&_val, _attrs_bundle, _idx, \
967 #define uverbs_get_const_default_signed(_to, _attrs_bundle, _idx, _default) \ argument
972 _uverbs_get_const_signed(&_val, _attrs_bundle, _idx, \
984 _uverbs_get_const_unsigned(&_val, _attrs_bundle, _idx, \
992 uverbs_get_const_signed(_to, _attrs_bundle, _idx) : \
993 uverbs_get_const_unsigned(_to, _attrs_bundle, _idx)) \
997 uverbs_get_const_default_signed(_to, _attrs_bundle, _idx, \
[all …]
/linux/drivers/usb/gadget/udc/
A Dpxa27x_udc.h263 #define PXA_EP_DEF(_idx, _addr, dir, _type, maxpkt, _config, iface, altset) \ argument
266 .name = "ep" #_idx, \
267 .idx = _idx, .enabled = 0, \
272 #define PXA_EP_BULK(_idx, addr, dir, config, iface, alt) \ argument
273 PXA_EP_DEF(_idx, addr, dir, USB_ENDPOINT_XFER_BULK, BULK_FIFO_SIZE, \
275 #define PXA_EP_ISO(_idx, addr, dir, config, iface, alt) \ argument
276 PXA_EP_DEF(_idx, addr, dir, USB_ENDPOINT_XFER_ISOC, ISO_FIFO_SIZE, \
278 #define PXA_EP_INT(_idx, addr, dir, config, iface, alt) \ argument
279 PXA_EP_DEF(_idx, addr, dir, USB_ENDPOINT_XFER_INT, INT_FIFO_SIZE, \
/linux/drivers/net/wireless/mediatek/mt7601u/
A Dregs.h592 #define MT_SKEY_0(_bss, _idx) \ argument
593 (MT_SKEY_BASE_0 + (4 * (_bss) + _idx) * 32)
594 #define MT_SKEY_1(_bss, _idx) \ argument
595 (MT_SKEY_BASE_1 + (4 * ((_bss) & 7) + _idx) * 32)
596 #define MT_SKEY(_bss, _idx) \ argument
597 ((_bss & 8) ? MT_SKEY_1(_bss, _idx) : MT_SKEY_0(_bss, _idx))
608 #define MT_SKEY_MODE_SHIFT(_bss, _idx) (4 * ((_idx) + 4 * (_bss & 1))) argument
A Dinit.c465 #define CHAN2G(_idx, _freq) { \ argument
468 .hw_value = (_idx), \
489 #define CCK_RATE(_idx, _rate) { \ argument
492 .hw_value = (MT_PHY_TYPE_CCK << 8) | _idx, \
493 .hw_value_short = (MT_PHY_TYPE_CCK << 8) | (8 + _idx), \
496 #define OFDM_RATE(_idx, _rate) { \ argument
498 .hw_value = (MT_PHY_TYPE_OFDM << 8) | _idx, \
499 .hw_value_short = (MT_PHY_TYPE_OFDM << 8) | _idx, \
/linux/drivers/net/wireless/mediatek/mt76/
A Dmt76x02_regs.h666 #define MT_SKEY_0(_bss, _idx) (MT_SKEY_BASE_0 + (4 * (_bss) + (_idx)) * 32) argument
667 #define MT_SKEY_1(_bss, _idx) (MT_SKEY_BASE_1 + (4 * ((_bss) & 7) + (_idx)) * 32) argument
668 #define MT_SKEY(_bss, _idx) (((_bss) & 8) ? MT_SKEY_1(_bss, _idx) : MT_SKEY_0(_bss, _idx)) argument
676 #define MT_SKEY_MODE_SHIFT(_bss, _idx) (4 * ((_idx) + 4 * ((_bss) & 1))) argument
/linux/drivers/net/wireless/ath/ath9k/
A Dcommon-init.c21 #define CHAN2G(_freq, _idx) { \ argument
24 .hw_value = (_idx), \
28 #define CHAN5G(_freq, _idx) { \ argument
31 .hw_value = (_idx), \
/linux/drivers/clk/nxp/
A Dclk-lpc32xx.c189 #define LPC32XX_CLK_DEFINE(_idx, _name, _flags, ...) \ argument
190 [CLK_PREFIX(_idx)] = { \
1083 #define LPC32XX_DEFINE_FIXED(_idx, _rate) \ argument
1084 [CLK_PREFIX(_idx)] = { \
1094 [CLK_PREFIX(_idx)] = { \
1110 [CLK_PREFIX(_idx)] = { \
1131 [CLK_PREFIX(_idx)] = { \
1150 [CLK_PREFIX(_idx)] = { \
1167 [CLK_PREFIX(_idx)] = { \
1188 [CLK_PREFIX(_idx)] = { \
[all …]
/linux/drivers/clk/tegra/
A Dclk-tegra-periph.c150 _clk_num, _gate_flags, _clk_id, _parents##_idx, 0,\
157 _parents##_idx, 0, _lock)
163 _parents##_idx, 0, NULL)
170 _clk_id, _parents##_idx, 0, NULL)
177 _clk_id, _parents##_idx, flags, NULL)
184 _clk_id, _parents##_idx, 0, NULL)
191 _parents##_idx, 0, NULL)
198 _parents##_idx, 0, NULL)
205 _parents##_idx, 0, NULL)
212 _clk_id, _parents##_idx, 0, NULL)
[all …]
/linux/drivers/clk/renesas/
A Dr9a06g032-clocks.c64 #define D_GATE(_idx, _n, _src, ...) \ argument
65 { .type = K_GATE, .index = R9A06G032_##_idx, \
68 #define D_MODULE(_idx, _n, _src, ...) \ argument
69 { .type = K_GATE, .index = R9A06G032_##_idx, \
72 #define D_ROOT(_idx, _n, _mul, _div) \ argument
73 { .type = K_FFC, .index = R9A06G032_##_idx, .name = _n, \
75 #define D_FFC(_idx, _n, _src, _div) \ argument
76 { .type = K_FFC, .index = R9A06G032_##_idx, \
79 #define D_DIV(_idx, _n, _src, _reg, _min, _max, ...) \ argument
80 { .type = K_DIV, .index = R9A06G032_##_idx, \
[all …]
/linux/include/linux/gpio/
A Dmachine.h77 #define GPIO_LOOKUP_IDX(_key, _chip_hwnum, _con_id, _idx, _flags) \ argument
82 .idx = _idx, \
/linux/drivers/iio/adc/
A Dmt6360-adc.c226 #define MT6360_ADC_CHAN(_idx, _type) { \ argument
228 .channel = MT6360_CHAN_##_idx, \
229 .scan_index = MT6360_CHAN_##_idx, \
230 .datasheet_name = #_idx, \
A Dvf610_adc.c503 #define VF610_ADC_CHAN(_idx, _chan_type) { \ argument
506 .channel = (_idx), \
511 .scan_index = (_idx), \
519 #define VF610_ADC_TEMPERATURE_CHAN(_idx, _chan_type) { \ argument
521 .channel = (_idx), \
523 .scan_index = (_idx), \
A Dlpc18xx_adc.c51 #define LPC18XX_ADC_CHAN(_idx) { \ argument
54 .channel = _idx, \
/linux/include/xen/interface/io/
A Dring.h184 #define RING_GET_REQUEST(_r, _idx) \ argument
185 (&((_r)->sring->ring[((_idx) & (RING_SIZE(_r) - 1))].req))
187 #define RING_GET_RESPONSE(_r, _idx) \ argument
188 (&((_r)->sring->ring[((_idx) & (RING_SIZE(_r) - 1))].rsp))
/linux/drivers/regulator/
A Dmax77826-regulator.c136 #define MAX77826_BUCK(_idx, _id, _ops) \ argument
147 .enable_mask = BIT(_idx * 2 + 1), \
148 .vsel_reg = MAX77826_REG_BUCK_VOUT + _idx * 2, \
/linux/net/mac80211/
A Drc80211_minstrel_ht.h65 #define MI_RATE(_group, _idx) \ argument
67 FIELD_PREP(MI_RATE_IDX_MASK, _idx))
/linux/fs/adfs/
A Ddir_f.c58 #define bufoff(_bh,_idx) \ argument
59 ({ int _buf = _idx >> blocksize_bits; \
60 int _off = _idx - (_buf << blocksize_bits);\
/linux/tools/perf/ui/
A Dhist.c461 #define HPP__COLOR_PRINT_FNS(_name, _fn, _idx) \ argument
471 .idx = PERF_HPP__ ## _idx, \
475 #define HPP__COLOR_ACC_PRINT_FNS(_name, _fn, _idx) \ argument
485 .idx = PERF_HPP__ ## _idx, \
489 #define HPP__PRINT_FNS(_name, _fn, _idx) \ argument
498 .idx = PERF_HPP__ ## _idx, \
/linux/arch/ia64/kernel/
A Dhead.S50 #define SAVE_BREAK_REGS(ptr, _idx, _breg, _dest)\ argument
52 mov _idx=0;; \
54 SAVE_FROM_REG(_breg[_idx], ptr, _dest);; \
55 add _idx=1,_idx;; \
58 #define RESTORE_BREAK_REGS(ptr, _idx, _breg, _tmp, _lbl)\ argument
60 mov _idx=0;; \
61 _lbl: RESTORE_REG(_breg[_idx], ptr, _tmp);; \
62 add _idx=1, _idx;; \
/linux/drivers/spi/
A Dspi-dw.h114 #define SPI_GET_BYTE(_val, _idx) \ argument
115 ((_val) >> (BITS_PER_BYTE * (_idx)) & 0xff)

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