Home
last modified time | relevance | path

Searched refs:_name (Results 1 – 25 of 586) sorted by relevance

12345678910>>...24

/linux/include/linux/
A Dhwmon-sysfs.h20 { .dev_attr = __ATTR(_name, _mode, _show, _store), \
23 #define SENSOR_ATTR_RO(_name, _func, _index) \ argument
24 SENSOR_ATTR(_name, 0444, _func##_show, NULL, _index)
26 #define SENSOR_ATTR_RW(_name, _func, _index) \ argument
29 #define SENSOR_ATTR_WO(_name, _func, _index) \ argument
30 SENSOR_ATTR(_name, 0200, NULL, _func##_store, _index)
34 = SENSOR_ATTR(_name, _mode, _show, _store, _index)
36 #define SENSOR_DEVICE_ATTR_RO(_name, _func, _index) \ argument
39 #define SENSOR_DEVICE_ATTR_RW(_name, _func, _index) \ argument
42 #define SENSOR_DEVICE_ATTR_WO(_name, _func, _index) \ argument
[all …]
A Dsysfs.h117 .show = _name##_show, \
123 .show = _name##_show, \
138 #define __ATTR_RW(_name) __ATTR(_name, 0644, _name##_show, _name##_store) argument
155 &_name##_group, \
163 __ATTRIBUTE_GROUPS(_name)
169 __ATTRIBUTE_GROUPS(_name)
221 __BIN_ATTR(_name, 0644, _name##_read, _name##_write, _size)
226 struct bin_attribute bin_attr_##_name = __BIN_ATTR(_name, _mode, _read, \
230 struct bin_attribute bin_attr_##_name = __BIN_ATTR_RO(_name, _size)
233 struct bin_attribute bin_attr_##_name = __BIN_ATTR_WO(_name, _size)
[all …]
A Dconfigfs.h125 .ca_name = __stringify(_name), \
128 .show = _pfx##_name##_show, \
129 .store = _pfx##_name##_store, \
134 .ca_name = __stringify(_name), \
137 .show = _pfx##_name##_show, \
142 .ca_name = __stringify(_name), \
145 .store = _pfx##_name##_store, \
162 .ca_name = __stringify(_name), \
168 .read = _pfx##_name##_read, \
169 .write = _pfx##_name##_write, \
[all …]
A Dcounter.h342 .name = (_name), \
349 .name = (_name), \
356 .name = (_name), \
364 .name = (_name), \
371 .name = (_name), \
378 .name = (_name), \
386 .name = (_name), \
393 .name = (_name), \
400 .name = (_name), \
428 .name = (_name), \
[all …]
A Dmdev.h111 #define MDEV_TYPE_ATTR(_name, _mode, _show, _store) \ argument
112 struct mdev_type_attribute mdev_type_attr_##_name = \
113 __ATTR(_name, _mode, _show, _store)
114 #define MDEV_TYPE_ATTR_RW(_name) \ argument
115 struct mdev_type_attribute mdev_type_attr_##_name = __ATTR_RW(_name)
116 #define MDEV_TYPE_ATTR_RO(_name) \ argument
117 struct mdev_type_attribute mdev_type_attr_##_name = __ATTR_RO(_name)
118 #define MDEV_TYPE_ATTR_WO(_name) \ argument
119 struct mdev_type_attribute mdev_type_attr_##_name = __ATTR_WO(_name)
/linux/drivers/thermal/qcom/
A Dtsens.h116 [_name##_##1] = REG_FIELD(_offset, 1, 1), \
117 [_name##_##2] = REG_FIELD(_offset, 2, 2), \
118 [_name##_##3] = REG_FIELD(_offset, 3, 3), \
119 [_name##_##4] = REG_FIELD(_offset, 4, 4), \
120 [_name##_##5] = REG_FIELD(_offset, 5, 5), \
121 [_name##_##6] = REG_FIELD(_offset, 6, 6), \
122 [_name##_##7] = REG_FIELD(_offset, 7, 7), \
123 [_name##_##8] = REG_FIELD(_offset, 8, 8), \
124 [_name##_##9] = REG_FIELD(_offset, 9, 9), \
130 [_name##_##15] = REG_FIELD(_offset, 15, 15)
[all …]
/linux/include/linux/iio/
A Dsysfs.h58 #define IIO_ATTR_RO(_name, _addr) \ argument
59 { .dev_attr = __ATTR_RO(_name), \
62 #define IIO_ATTR_WO(_name, _addr) \ argument
63 { .dev_attr = __ATTR_WO(_name), \
66 #define IIO_ATTR_RW(_name, _addr) \ argument
67 { .dev_attr = __ATTR_RW(_name), \
71 struct iio_dev_attr iio_dev_attr_##_name \
76 = IIO_ATTR_RO(_name, _addr)
80 = IIO_ATTR_WO(_name, _addr)
84 = IIO_ATTR_RW(_name, _addr)
[all …]
/linux/drivers/staging/rtl8723bs/hal/
A Dodm_interface.h16 #define _reg_all(_name) ODM_##_name argument
17 #define _reg_ic(_name, _ic) ODM_##_name##_ic argument
18 #define _bit_all(_name) BIT_##_name argument
19 #define _bit_ic(_name, _ic) BIT_##_name##_ic argument
29 #define _reg_11N(_name) ODM_REG_##_name##_11N argument
30 #define _bit_11N(_name) ODM_BIT_##_name##_11N argument
32 #define _cat(_name, _ic_type, _func) _func##_11N(_name) argument
37 #define ODM_REG(_name, _pDM_Odm) _cat(_name, _pDM_Odm->SupportICType, _reg) argument
38 #define ODM_BIT(_name, _pDM_Odm) _cat(_name, _pDM_Odm->SupportICType, _bit) argument
/linux/drivers/clk/sprd/
A Dgate.h42 .hw.init = _fn(_name, _parent, \
50 SPRD_SC_GATE_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, \
56 SPRD_SC_GATE_CLK_OPS_UDELAY(_struct, _name, _parent, _reg, \
66 #define SPRD_GATE_CLK(_struct, _name, _parent, _reg, \ argument
68 SPRD_SC_GATE_CLK_OPS(_struct, _name, _parent, _reg, 0, \
75 SPRD_SC_GATE_CLK_OPS_UDELAY(_struct, _name, _parent, _reg, \
85 SPRD_SC_GATE_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, \
97 #define SPRD_SC_GATE_CLK_HW(_struct, _name, _parent, _reg, \ argument
100 SPRD_SC_GATE_CLK_HW_OPS(_struct, _name, _parent, _reg, \
104 #define SPRD_GATE_CLK_HW(_struct, _name, _parent, _reg, \ argument
[all …]
/linux/drivers/clk/renesas/
A Drzg2l-cpg.h85 #define DEF_TYPE(_name, _id, _type...) \ argument
86 { .name = _name, .id = _id, .type = _type }
87 #define DEF_BASE(_name, _id, _type, _parent...) \ argument
88 DEF_TYPE(_name, _id, _type, .parent = _parent)
89 #define DEF_SAMPLL(_name, _id, _parent, _conf) \ argument
91 #define DEF_INPUT(_name, _id) \ argument
92 DEF_TYPE(_name, _id, CLK_TYPE_IN)
96 DEF_TYPE(_name, _id, CLK_TYPE_DIV, .conf = _conf, \
100 DEF_TYPE(_name, _id, CLK_TYPE_MUX, .conf = _conf, \
128 .name = _name, \
[all …]
A Drenesas-cpg-mssr.h44 #define DEF_TYPE(_name, _id, _type...) \ argument
45 { .name = _name, .id = _id, .type = _type }
46 #define DEF_BASE(_name, _id, _type, _parent...) \ argument
47 DEF_TYPE(_name, _id, _type, .parent = _parent)
49 #define DEF_INPUT(_name, _id) \ argument
50 DEF_TYPE(_name, _id, CLK_TYPE_IN)
53 #define DEF_DIV6P1(_name, _id, _parent, _offset) \ argument
57 #define DEF_RATE(_name, _id, _rate) \ argument
58 DEF_TYPE(_name, _id, CLK_TYPE_FR, .mult = _rate)
75 #define DEF_MOD(_name, _mod, _parent...) \ argument
[all …]
A Drcar-gen3-cpg.h35 #define DEF_GEN3_SD(_name, _id, _parent, _offset) \ argument
36 DEF_BASE(_name, _id, CLK_TYPE_GEN3_SD, _parent, .offset = _offset)
39 DEF_BASE(_name, _id, CLK_TYPE_GEN3_MDSEL, \
45 DEF_GEN3_MDSEL(_name, _id, 12, _parent_sscg, _div_sscg, \
48 #define DEF_GEN3_OSC(_name, _id, _parent, _div) \ argument
49 DEF_BASE(_name, _id, CLK_TYPE_GEN3_OSC, _parent, .div = _div)
52 DEF_BASE(_name, _id, CLK_TYPE_GEN3_RCKSEL, \
55 #define DEF_GEN3_Z(_name, _id, _type, _parent, _div, _offset) \ argument
56 DEF_BASE(_name, _id, _type, _parent, .div = _div, .offset = _offset)
58 #define DEF_FIXED_RPCSRC_E3(_name, _id, _parent0, _parent1) \ argument
[all …]
/linux/drivers/regulator/
A Dmc13xxx.h56 [prefix ## _name] = { \
63 .id = prefix ## _name, \
67 .enable_bit = prefix ## _reg ## _ ## _name ## EN, \
69 .vsel_shift = prefix ## _vsel_reg ## _ ## _name ## VSEL,\
70 .vsel_mask = prefix ## _vsel_reg ## _ ## _name ## VSEL_M,\
74 [prefix ## _name] = { \
81 .id = prefix ## _name, \
85 .enable_bit = prefix ## _reg ## _ ## _name ## EN, \
89 [prefix ## _name] = { \
96 .id = prefix ## _name, \
[all …]
/linux/drivers/platform/x86/dell/
A Ddcdbas.h50 #define DCDBAS_DEV_ATTR_RW(_name) \ argument
51 DEVICE_ATTR(_name,0600,_name##_show,_name##_store);
53 #define DCDBAS_DEV_ATTR_RO(_name) \ argument
54 DEVICE_ATTR(_name,0400,_name##_show,NULL);
56 #define DCDBAS_DEV_ATTR_WO(_name) \ argument
57 DEVICE_ATTR(_name,0200,NULL,_name##_store);
59 #define DCDBAS_BIN_ATTR_RW(_name) \ argument
60 struct bin_attribute bin_attr_##_name = { \
61 .attr = { .name = __stringify(_name), \
63 .read = _name##_read, \
[all …]
/linux/include/rdma/
A Dib_sysfs.h21 #define IB_PORT_ATTR_RW(_name) \ argument
22 struct ib_port_attribute ib_port_attr_##_name = __ATTR_RW(_name)
24 #define IB_PORT_ATTR_ADMIN_RW(_name) \ argument
25 struct ib_port_attribute ib_port_attr_##_name = \
26 __ATTR_RW_MODE(_name, 0600)
28 #define IB_PORT_ATTR_RO(_name) \ argument
29 struct ib_port_attribute ib_port_attr_##_name = __ATTR_RO(_name)
31 #define IB_PORT_ATTR_WO(_name) \ argument
32 struct ib_port_attribute ib_port_attr_##_name = __ATTR_WO(_name)
/linux/arch/x86/include/asm/
A Dpercpu.h409 __typeof__(_type) *_name##_early_ptr __refdata = _name##_early_map
415 __typeof__(_type) *_name##_early_ptr __refdata = _name##_early_map
418 EXPORT_PER_CPU_SYMBOL(_name)
421 DECLARE_PER_CPU(_type, _name); \
430 #define early_per_cpu_ptr(_name) (_name##_early_ptr) argument
431 #define early_per_cpu_map(_name, _idx) (_name##_early_map[_idx]) argument
433 *(early_per_cpu_ptr(_name) ? \
435 &per_cpu(_name, _cpu))
445 EXPORT_PER_CPU_SYMBOL(_name)
448 DECLARE_PER_CPU(_type, _name)
[all …]
/linux/drivers/clk/mvebu/
A Darmada-37xx-periph.c139 struct clk_mux mux_##_name = { \
199 #define REF_CLK_FULL(_name) \ argument
200 { .name = #_name, \
204 .mux_hw = &mux_##_name.hw, \
210 { .name = #_name, \
214 .mux_hw = &mux_##_name.hw, \
221 { .name = #_name, \
228 { .name = #_name, \
236 { .name = #_name, \
244 { .name = #_name, \
[all …]
/linux/include/linux/mfd/
A Dcore.h19 .name = (_name), \
34 #define MFD_CELL_OF(_name, _res, _pdata, _pdsize, _id, _compat) \ argument
35 MFD_CELL_ALL(_name, _res, _pdata, _pdsize, _id, _compat, 0, false, NULL)
37 #define MFD_CELL_ACPI(_name, _res, _pdata, _pdsize, _id, _match) \ argument
38 MFD_CELL_ALL(_name, _res, _pdata, _pdsize, _id, NULL, 0, false, _match)
40 #define MFD_CELL_BASIC(_name, _res, _pdata, _pdsize, _id) \ argument
41 MFD_CELL_ALL(_name, _res, _pdata, _pdsize, _id, NULL, 0, false, NULL)
43 #define MFD_CELL_RES(_name, _res) \ argument
44 MFD_CELL_ALL(_name, _res, NULL, 0, 0, NULL, 0, false, NULL)
46 #define MFD_CELL_NAME(_name) \ argument
[all …]
/linux/drivers/gpu/drm/amd/pm/inc/
A Damdgpu_pm.h63 #define __AMDGPU_DEVICE_ATTR(_name, _mode, _show, _store, _flags, ...) \ argument
64 { .dev_attr = __ATTR(_name, _mode, _show, _store), \
68 #define AMDGPU_DEVICE_ATTR(_name, _mode, _flags, ...) \ argument
69 __AMDGPU_DEVICE_ATTR(_name, _mode, \
70 amdgpu_get_##_name, amdgpu_set_##_name, \
73 #define AMDGPU_DEVICE_ATTR_RW(_name, _flags, ...) \ argument
74 AMDGPU_DEVICE_ATTR(_name, S_IRUGO | S_IWUSR, \
77 #define AMDGPU_DEVICE_ATTR_RO(_name, _flags, ...) \ argument
78 __AMDGPU_DEVICE_ATTR(_name, S_IRUGO, \
79 amdgpu_get_##_name, NULL, \
/linux/drivers/clk/mediatek/
A Dclk-mt8195-infra_ao.c44 GATE_MTK_FLAGS(_id, _name, _parent, &infra_ao0_cg_regs, _shift, \
47 #define GATE_INFRA_AO0(_id, _name, _parent, _shift) \ argument
48 GATE_INFRA_AO0_FLAGS(_id, _name, _parent, _shift, 0)
51 GATE_MTK_FLAGS(_id, _name, _parent, &infra_ao1_cg_regs, _shift, \
54 #define GATE_INFRA_AO1(_id, _name, _parent, _shift) \ argument
55 GATE_INFRA_AO1_FLAGS(_id, _name, _parent, _shift, 0)
57 #define GATE_INFRA_AO2(_id, _name, _parent, _shift) \ argument
64 #define GATE_INFRA_AO3(_id, _name, _parent, _shift) \ argument
65 GATE_INFRA_AO3_FLAGS(_id, _name, _parent, _shift, 0)
71 #define GATE_INFRA_AO4(_id, _name, _parent, _shift) \ argument
[all …]
A Dclk-mtk.h30 #define FIXED_CLK(_id, _name, _parent, _rate) { \ argument
32 .name = _name, \
48 #define FACTOR(_id, _name, _parent, _mult, _div) { \ argument
50 .name = _name, \
85 .name = _name, \
104 MUX_GATE_FLAGS_2(_id, _name, _parents, _reg, \
115 #define MUX(_id, _name, _parents, _reg, _shift, _width) \ argument
116 MUX_FLAGS(_id, _name, _parents, _reg, \
121 .name = _name, \
136 .name = _name, \
[all …]
/linux/drivers/clk/pistachio/
A Dclk.h19 #define GATE(_id, _name, _pname, _reg, _shift) \ argument
24 .name = _name, \
39 #define MUX(_id, _name, _pnames, _reg, _shift) \ argument
44 .name = _name, \
59 #define DIV(_id, _name, _pname, _reg, _width) \ argument
65 .name = _name, \
75 .name = _name, \
86 #define FIXED_FACTOR(_id, _name, _pname, _div) \ argument
90 .name = _name, \
126 .name = _name, \
[all …]
/linux/drivers/clk/sunxi-ng/
A Dccu_div.h96 .hw.init = CLK_HW_INIT(_name, \
104 #define SUNXI_CCU_DIV_TABLE(_struct, _name, _parent, _reg, \ argument
107 SUNXI_CCU_DIV_TABLE_WITH_GATE(_struct, _name, _parent, _reg, \
111 #define SUNXI_CCU_M_WITH_MUX_TABLE_GATE(_struct, _name, \ argument
123 .hw.init = CLK_HW_INIT_PARENTS(_name, \
133 SUNXI_CCU_M_WITH_MUX_TABLE_GATE(_struct, _name, \
139 #define SUNXI_CCU_M_WITH_MUX(_struct, _name, _parents, _reg, \ argument
142 SUNXI_CCU_M_WITH_MUX_TABLE_GATE(_struct, _name, \
149 #define SUNXI_CCU_M_WITH_GATE(_struct, _name, _parent, _reg, \ argument
157 .hw.init = CLK_HW_INIT(_name, \
[all …]
/linux/sound/soc/mediatek/mt8195/
A Dmt8195-audsys-clk.c30 .name = _name, \
38 #define GATE_AFE(_id, _name, _parent, _reg, _bit) \ argument
39 GATE_AFE_FLAGS(_id, _name, _parent, _reg, _bit, \
42 #define GATE_AUD0(_id, _name, _parent, _bit) \ argument
43 GATE_AFE(_id, _name, _parent, AUDIO_TOP_CON0, _bit)
45 #define GATE_AUD1(_id, _name, _parent, _bit) \ argument
46 GATE_AFE(_id, _name, _parent, AUDIO_TOP_CON1, _bit)
48 #define GATE_AUD3(_id, _name, _parent, _bit) \ argument
51 #define GATE_AUD4(_id, _name, _parent, _bit) \ argument
54 #define GATE_AUD5(_id, _name, _parent, _bit) \ argument
[all …]
/linux/drivers/s390/scsi/
A Dzfcp_sysfs.c18 struct device_attribute dev_attr_##_feat##_##_name = __ATTR(_name, _mode,\
562 cc = lat->_name.counter; \
586 lat->_name.fabric.sum = 0; \
587 lat->_name.fabric.min = 0xFFFFFFFF; \
588 lat->_name.fabric.max = 0; \
589 lat->_name.channel.sum = 0; \
590 lat->_name.channel.min = 0xFFFFFFFF; \
591 lat->_name.channel.max = 0; \
592 lat->_name.counter = 0; \
615 static DEVICE_ATTR(_name, S_IRUGO, zfcp_sysfs_scsi_##_name##_show, NULL);
[all …]

Completed in 61 milliseconds

12345678910>>...24