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Searched refs:aeq (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/infiniband/hw/irdma/
A Dhw.c205 struct irdma_aeq *aeq = &rf->aeq; in irdma_process_aeq() local
590 struct irdma_aeq *aeq = &rf->aeq; in irdma_destroy_virt_aeq() local
611 struct irdma_aeq *aeq = &rf->aeq; in irdma_destroy_aeq() local
629 dma_free_coherent(dev->hw->device, aeq->mem.size, aeq->mem.va, in irdma_destroy_aeq()
1310 struct irdma_aeq *aeq = &rf->aeq; in irdma_create_virt_aeq() local
1318 aeq->mem.va = vzalloc(aeq->mem.size); in irdma_create_virt_aeq()
1320 if (!aeq->mem.va) in irdma_create_virt_aeq()
1353 struct irdma_aeq *aeq = &rf->aeq; in irdma_create_aeq() local
1364 aeq->mem.va = dma_alloc_coherent(dev->hw->device, aeq->mem.size, in irdma_create_aeq()
1367 if (aeq->mem.va) in irdma_create_aeq()
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A Dctrl.c3899 aeq->size = sizeof(*aeq); in irdma_sc_aeq_init()
3900 aeq->polarity = 1; in irdma_sc_aeq_init()
3905 IRDMA_RING_INIT(aeq->aeq_ring, aeq->elem_cnt); in irdma_sc_aeq_init()
3907 aeq->pbl_list = (aeq->virtual_map ? info->pbl_list : NULL); in irdma_sc_aeq_init()
3908 aeq->pbl_chunk_size = (aeq->virtual_map ? info->pbl_chunk_size : 0); in irdma_sc_aeq_init()
3911 info->dev->aeq = aeq; in irdma_sc_aeq_init()
3929 cqp = aeq->dev->cqp; in irdma_sc_aeq_create()
3935 (aeq->virtual_map ? 0 : aeq->aeq_elem_pa)); in irdma_sc_aeq_create()
3937 (aeq->virtual_map ? aeq->first_pm_pbl_idx : 0)); in irdma_sc_aeq_create()
3969 dev = aeq->dev; in irdma_sc_aeq_destroy()
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A Dtype.h645 struct irdma_sc_aeq *aeq; member
1220 enum irdma_status_code irdma_sc_aeq_init(struct irdma_sc_aeq *aeq,
1222 enum irdma_status_code irdma_sc_get_next_aeqe(struct irdma_sc_aeq *aeq,
1395 struct irdma_sc_aeq *aeq; member
1400 struct irdma_sc_aeq *aeq; member
A Dicrdma_hw.c62 if (dev->ceq_itr && dev->aeq->msix_idx != idx) in icrdma_ena_irq()
A Dmain.h302 struct irdma_aeq aeq; member
A Dutils.c1986 cqp_info->in.u.aeq_create.aeq = sc_aeq; in irdma_cqp_aeq_cmd()
/linux/arch/xtensa/variants/test_mmuhifi_c3/include/variant/
A Dtie.h114 XCHAL_SA_REG(s,0,0,2,0, aeq0, 8, 8, 8,0x0068, aeq,0 , 56,0,0,0) \
115 XCHAL_SA_REG(s,0,0,2,0, aeq1, 8, 8, 8,0x0069, aeq,1 , 56,0,0,0) \
116 XCHAL_SA_REG(s,0,0,2,0, aeq2, 8, 8, 8,0x006A, aeq,2 , 56,0,0,0) \
117 XCHAL_SA_REG(s,0,0,2,0, aeq3, 8, 8, 8,0x006B, aeq,3 , 56,0,0,0)
/linux/arch/xtensa/variants/test_kc705_be/include/variant/
A Dtie.h145 XCHAL_SA_REG(s,0,0,2,0, aeq0, 8, 8, 8,0x0068, aeq,0 , 56,0,0,0) \
146 XCHAL_SA_REG(s,0,0,2,0, aeq1, 8, 8, 8,0x0069, aeq,1 , 56,0,0,0) \
147 XCHAL_SA_REG(s,0,0,2,0, aeq2, 8, 8, 8,0x006A, aeq,2 , 56,0,0,0) \
148 XCHAL_SA_REG(s,0,0,2,0, aeq3, 8, 8, 8,0x006B, aeq,3 , 56,0,0,0)
/linux/drivers/net/ethernet/huawei/hinic/
A Dhinic_hw_eqs.c364 struct hinic_eq *aeq; in eq_irq_work() local
366 aeq = aeq_work->data; in eq_irq_work()
367 eq_irq_handler(aeq); in eq_irq_work()
389 struct hinic_eq *aeq = data; in aeq_interrupt() local
393 hinic_msix_attr_cnt_clear(aeq->hwif, aeq->msix_entry.entry); in aeq_interrupt()
395 aeq_work = &aeq->aeq_work; in aeq_interrupt()
396 aeq_work->data = aeq; in aeq_interrupt()
398 aeqs = aeq_to_aeqs(aeq); in aeq_interrupt()
888 remove_eq(&aeqs->aeq[i]); in hinic_aeqs_init()
903 remove_eq(&aeqs->aeq[q_id]); in hinic_aeqs_free()
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A Dhinic_hw_eqs.h208 struct hinic_eq aeq[HINIC_MAX_AEQS]; member

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