Searched refs:anatop_base (Results 1 – 6 of 6) sorted by relevance
/linux/drivers/clk/imx/ |
A D | clk-imx8mp.c | 409 void __iomem *anatop_base, *ccm_base; in imx8mp_clocks_probe() local 412 anatop_base = of_iomap(np, 0); in imx8mp_clocks_probe() 414 if (WARN_ON(!anatop_base)) in imx8mp_clocks_probe() 420 iounmap(anatop_base); in imx8mp_clocks_probe() 426 iounmap(anatop_base); in imx8mp_clocks_probe() 474 …hws[IMX8MP_AUDIO_PLL1_OUT] = imx_clk_hw_gate("audio_pll1_out", "audio_pll1_bypass", anatop_base, 1… in imx8mp_clocks_probe() 477 …hws[IMX8MP_DRAM_PLL_OUT] = imx_clk_hw_gate("dram_pll_out", "dram_pll_bypass", anatop_base + 0x50, … in imx8mp_clocks_probe() 478 hws[IMX8MP_GPU_PLL_OUT] = imx_clk_hw_gate("gpu_pll_out", "gpu_pll_bypass", anatop_base + 0x64, 11); in imx8mp_clocks_probe() 479 hws[IMX8MP_VPU_PLL_OUT] = imx_clk_hw_gate("vpu_pll_out", "vpu_pll_bypass", anatop_base + 0x74, 11); in imx8mp_clocks_probe() 480 hws[IMX8MP_ARM_PLL_OUT] = imx_clk_hw_gate("arm_pll_out", "arm_pll_bypass", anatop_base + 0x84, 11); in imx8mp_clocks_probe() [all …]
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A D | clk-vf610.c | 59 #define PLL1_CTRL (anatop_base + 0x270) 60 #define PLL2_CTRL (anatop_base + 0x30) 61 #define PLL3_CTRL (anatop_base + 0x10) 62 #define PLL4_CTRL (anatop_base + 0x70) 63 #define PLL5_CTRL (anatop_base + 0xe0) 64 #define PLL6_CTRL (anatop_base + 0xa0) 65 #define PLL7_CTRL (anatop_base + 0x20) 66 #define ANA_MISC1 (anatop_base + 0x160) 68 static void __iomem *anatop_base; variable 200 anatop_base = of_iomap(np, 0); in vf610_clocks_init() [all …]
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A D | clk-imx6sl.c | 103 static void __iomem *anatop_base; variable 132 if ((readl_relaxed(anatop_base + PLL_ARM) & in imx6sl_get_arm_divider_for_wait() 146 saved_pll_arm = val = readl_relaxed(anatop_base + PLL_ARM); in imx6sl_enable_pll_arm() 149 writel_relaxed(val, anatop_base + PLL_ARM); in imx6sl_enable_pll_arm() 150 while (!(readl_relaxed(anatop_base + PLL_ARM) & BM_PLL_ARM_LOCK)) in imx6sl_enable_pll_arm() 153 writel_relaxed(saved_pll_arm, anatop_base + PLL_ARM); in imx6sl_enable_pll_arm() 206 anatop_base = base; in imx6sl_clocks_init()
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A D | clk-imx6q.c | 391 static void disable_anatop_clocks(void __iomem *anatop_base) in disable_anatop_clocks() argument 396 reg = readl_relaxed(anatop_base + CCM_ANALOG_PFD_528); in disable_anatop_clocks() 403 writel_relaxed(reg, anatop_base + CCM_ANALOG_PFD_528); in disable_anatop_clocks() 406 reg = readl_relaxed(anatop_base + CCM_ANALOG_PFD_480); in disable_anatop_clocks() 408 writel_relaxed(reg, anatop_base + CCM_ANALOG_PFD_480); in disable_anatop_clocks() 411 reg = readl_relaxed(anatop_base + CCM_ANALOG_PLL_VIDEO); in disable_anatop_clocks() 413 writel_relaxed(reg, anatop_base + CCM_ANALOG_PLL_VIDEO); in disable_anatop_clocks() 434 void __iomem *anatop_base, *base; in imx6q_clocks_init() local 456 anatop_base = base = of_iomap(np, 0); in imx6q_clocks_init() 639 disable_anatop_clocks(anatop_base); in imx6q_clocks_init()
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/linux/arch/arm/mach-imx/ |
A D | anatop.c | 97 void __iomem *anatop_base; in imx_init_revision_from_anatop() local 104 anatop_base = of_iomap(np, 0); in imx_init_revision_from_anatop() 105 WARN_ON(!anatop_base); in imx_init_revision_from_anatop() 110 digprog = readl_relaxed(anatop_base + offset); in imx_init_revision_from_anatop() 111 iounmap(anatop_base); in imx_init_revision_from_anatop()
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/linux/drivers/soc/imx/ |
A D | soc-imx8m.c | 113 void __iomem *anatop_base; in imx8mm_soc_revision() local 120 anatop_base = of_iomap(np, 0); in imx8mm_soc_revision() 121 WARN_ON(!anatop_base); in imx8mm_soc_revision() 123 rev = readl_relaxed(anatop_base + ANADIG_DIGPROG_IMX8MM); in imx8mm_soc_revision() 125 iounmap(anatop_base); in imx8mm_soc_revision()
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