Searched refs:arm_v7s_cfg (Results 1 – 5 of 5) sorted by relevance
| /linux/drivers/iommu/ |
| A D | msm_iommu.c | 273 SET_TTBCR(base, ctx, priv->cfg.arm_v7s_cfg.tcr); in __program_context()
274 SET_TTBR0(base, ctx, priv->cfg.arm_v7s_cfg.ttbr); in __program_context()
278 SET_PRRR(base, ctx, priv->cfg.arm_v7s_cfg.prrr); in __program_context()
279 SET_NMRR(base, ctx, priv->cfg.arm_v7s_cfg.nmrr); in __program_context()
|
| A D | io-pgtable-arm-v7s.c | 825 cfg->arm_v7s_cfg.tcr = 0; in arm_v7s_alloc_pgtable()
832 cfg->arm_v7s_cfg.prrr = ARM_V7S_PRRR_TR(1, ARM_V7S_PRRR_TYPE_DEVICE) | in arm_v7s_alloc_pgtable()
837 cfg->arm_v7s_cfg.nmrr = ARM_V7S_NMRR_IR(7, ARM_V7S_RGN_WBWA) | in arm_v7s_alloc_pgtable()
849 cfg->arm_v7s_cfg.ttbr = virt_to_phys(data->pgd) | ARM_V7S_TTBR_S | in arm_v7s_alloc_pgtable()
|
| A D | mtk_iommu.c | 480 writel(dom->cfg.arm_v7s_cfg.ttbr & MMU_PT_ADDR_MASK, in mtk_iommu_attach_device()
982 writel(m4u_dom->cfg.arm_v7s_cfg.ttbr & MMU_PT_ADDR_MASK, base + REG_MMU_PT_BASE_ADDR); in mtk_iommu_runtime_resume()
|
| /linux/include/linux/ |
| A D | io-pgtable.h | 129 } arm_v7s_cfg; member
|
| /linux/drivers/iommu/arm/arm-smmu/ |
| A D | arm-smmu.c | 484 cb->tcr[0] = pgtbl_cfg->arm_v7s_cfg.tcr; in arm_smmu_init_context_bank()
500 cb->ttbr[0] = pgtbl_cfg->arm_v7s_cfg.ttbr; in arm_smmu_init_context_bank()
520 cb->mair[0] = pgtbl_cfg->arm_v7s_cfg.prrr; in arm_smmu_init_context_bank()
521 cb->mair[1] = pgtbl_cfg->arm_v7s_cfg.nmrr; in arm_smmu_init_context_bank()
|
Completed in 15 milliseconds