/linux/Documentation/devicetree/bindings/phy/ |
A D | ti,phy-j721e-wiz.yaml | 51 assigned-clocks: 55 assigned-clock-parents: 59 assigned-clock-rates: 96 assigned-clocks: 99 assigned-clock-parents: 105 - assigned-clocks 106 - assigned-clock-parents 122 assigned-clocks: 125 assigned-clock-parents: 131 - assigned-clocks [all …]
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/linux/Documentation/devicetree/bindings/sound/ |
A D | nvidia,tegra-audio-graph-card.yaml | 35 assigned-clocks: 39 assigned-clock-parents: 43 assigned-clock-rates: 53 - assigned-clocks 54 - assigned-clock-parents 69 assigned-clocks = <&tegra_car TEGRA210_CLK_PLL_A>, 73 assigned-clock-rates = <368640000>, <49152000>, <12288000>; 91 assigned-clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>; 92 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>; 161 assigned-clocks = <&tegra_car TEGRA210_CLK_I2S0>; [all …]
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A D | nvidia,tegra210-ahub.yaml | 42 assigned-clocks: 45 assigned-clock-parents: 48 assigned-clock-rates: 113 - assigned-clocks 114 - assigned-clock-parents 130 assigned-clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>; 131 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>; 167 assigned-clocks = <&tegra_car TEGRA210_CLK_I2S0>; 169 assigned-clock-rates = <1536000>; 178 assigned-clocks = <&tegra_car TEGRA210_CLK_DMIC1>; [all …]
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A D | brcm,cygnus-audio.txt | 13 - assigned-clocks: PLL and leaf clocks 14 - assigned-clock-parents: parent clocks of the assigned clocks 16 - assigned-clock-rates: List of clock frequencies of the 17 assigned clocks 36 assigned-clocks = <&audiopll BCM_CYGNUS_AUDIOPLL>, 40 assigned-clock-parents = <&audiopll BCM_CYGNUS_AUDIOPLL>; 41 assigned-clock-rates = <1769470191>,
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A D | nvidia,tegra210-dmic.yaml | 44 assigned-clocks: 47 assigned-clock-parents: 50 assigned-clock-rates: 78 - assigned-clocks 79 - assigned-clock-parents 92 assigned-clocks = <&tegra_car TEGRA210_CLK_DMIC1>; 93 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>; 94 assigned-clock-rates = <3072000>;
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A D | nvidia,tegra186-dspk.yaml | 43 assigned-clocks: 46 assigned-clock-parents: 49 assigned-clock-rates: 77 - assigned-clocks 78 - assigned-clock-parents 92 assigned-clocks = <&bpmp TEGRA186_CLK_DSPK1>; 93 assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>; 94 assigned-clock-rates = <12288000>;
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A D | mt2701-afe-pcm.txt | 47 - assigned-clocks: list of input clocks and dividers for the audio system. 49 - assigned-clocks-parents: parent of input clocks of assigned clocks. 50 - assigned-clock-rates: list of clock frequencies of assigned clocks. 138 assigned-clocks = <&topckgen CLK_TOP_AUD_MUX1_SEL>, 142 assigned-clock-parents = <&topckgen CLK_TOP_AUD1PLL_98M>, 144 assigned-clock-rates = <0>, <0>, <49152000>, <45158400>;
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A D | nvidia,tegra210-i2s.yaml | 57 assigned-clocks: 61 assigned-clock-parents: 65 assigned-clock-rates: 94 - assigned-clocks 95 - assigned-clock-parents 108 assigned-clocks = <&tegra_car TEGRA210_CLK_I2S0>; 109 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>; 110 assigned-clock-rates = <1536000>;
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/linux/arch/arm/boot/dts/ |
A D | imx7ulp.dtsi | 154 assigned-clocks = <&pcc2 IMX7ULP_CLK_LPUART4>; 156 assigned-clock-rates = <24000000>; 166 assigned-clocks = <&pcc2 IMX7ULP_CLK_LPUART5>; 168 assigned-clock-rates = <48000000>; 175 assigned-clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>; 261 assigned-clocks = <&pcc2 IMX7ULP_CLK_WDG1>; 285 assigned-clocks = <&pcc2 IMX7ULP_CLK_LPTPM5>; 335 assigned-clock-rates = <48000000>; 347 assigned-clock-rates = <48000000>; 359 assigned-clock-rates = <48000000>; [all …]
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A D | exynos4412-odroid-common.dtsi | 126 assigned-clocks = <&clock CLK_FOUT_EPLL>; 127 assigned-clock-rates = <45158401>; 140 assigned-clock-rates = <0>, <0>, 208 assigned-clocks = <&clock CLK_MOUT_FIMC0>, 211 assigned-clock-rates = <0>, <176000000>; 216 assigned-clocks = <&clock CLK_MOUT_FIMC1>, 219 assigned-clock-rates = <0>, <176000000>; 224 assigned-clocks = <&clock CLK_MOUT_FIMC2>, 227 assigned-clock-rates = <0>, <176000000>; 232 assigned-clocks = <&clock CLK_MOUT_FIMC3>, [all …]
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A D | imx7d-remarkable2.dts | 48 assigned-clocks = <&clks IMX7D_CLKO2_ROOT_SRC>, 50 assigned-clock-parents = <&clks IMX7D_CKIL>; 51 assigned-clock-rates = <0>, <32768>; 61 assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>; 62 assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>; 69 assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>; 70 assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>; 107 assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>; 108 assigned-clock-rates = <400000000>;
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A D | imx7d-pico.dtsi | 105 assigned-clocks = <&clks IMX7D_CLKO2_ROOT_SRC>, 107 assigned-clock-parents = <&clks IMX7D_CKIL>; 108 assigned-clock-rates = <0>, <32768>; 124 assigned-clock-rates = <0>, <100000000>; 278 assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>, 281 assigned-clock-rates = <0>, <24576000>; 313 assigned-clocks = <&clks IMX7D_UART5_ROOT_SRC>; 321 assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>; 330 assigned-clocks = <&clks IMX7D_UART7_ROOT_SRC>; 379 assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>; [all …]
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A D | imx7d-zii-rpu2.dts | 190 assigned-clock-rates = <884736000>; 214 assigned-clock-rates = <0>, <100000000>; 297 assigned-clock-rates = <0>, <100000000>; 457 assigned-clocks = <&cs2000>; 458 assigned-clock-rates = <24000000>; 568 assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>, 571 assigned-clock-rates = <0>, <36864000>; 578 assigned-clocks = <&clks IMX7D_SAI2_ROOT_SRC>, 581 assigned-clock-rates = <0>, <36864000>; 588 assigned-clocks = <&clks IMX7D_SAI3_ROOT_SRC>, [all …]
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A D | imx7d-sdb.dts | 222 assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>, 225 assigned-clock-rates = <0>, <100000000>; 249 assigned-clocks = <&clks IMX7D_ENET2_TIME_ROOT_SRC>, 252 assigned-clock-rates = <0>, <100000000>; 429 assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>, 433 assigned-clock-rates = <0>, <884736000>, <36864000>; 440 assigned-clocks = <&clks IMX7D_SAI3_ROOT_SRC>, 455 assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>; 463 assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>; 508 assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>; [all …]
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A D | imx7d-cl-som-imx7.dts | 47 assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>, 49 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>; 50 assigned-clock-rates = <0>, <100000000>; 75 assigned-clocks = <&clks IMX7D_ENET2_TIME_ROOT_SRC>, 77 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>; 78 assigned-clock-rates = <0>, <100000000>; 197 assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>; 198 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>; 212 assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>; 213 assigned-clock-rates = <400000000>;
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/linux/Documentation/devicetree/bindings/iio/adc/ |
A D | nxp,imx8qxp-adc.yaml | 33 assigned-clocks: 36 assigned-clock-rates: 51 - assigned-clocks 52 - assigned-clock-rates 72 assigned-clocks = <&clk IMX_SC_R_ADC_0>; 73 assigned-clock-rates = <24000000>;
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/linux/arch/arm64/boot/dts/ti/ |
A D | k3-j721e-common-proc-board.dts | 516 assigned-clocks = <&k3_clks 157 371>; 570 assigned-clocks = <&k3_clks 152 1>, 647 assigned-clocks = <&wiz0_pll1_refclk>; 648 assigned-clock-parents = <&cmn_refclk1>; 652 assigned-clocks = <&wiz0_refclk_dig>; 653 assigned-clock-parents = <&cmn_refclk1>; 657 assigned-clocks = <&wiz1_pll1_refclk>; 658 assigned-clock-parents = <&cmn_refclk1>; 662 assigned-clocks = <&wiz1_refclk_dig>; 667 assigned-clocks = <&wiz2_pll1_refclk>; [all …]
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/linux/arch/mips/boot/dts/img/ |
A D | pistachio.dtsi | 53 assigned-clock-rates = <100000000>, <33333334>; 71 assigned-clock-rates = <100000000>, <33333334>; 141 assigned-clocks = <&clk_core CLK_I2S_DIV>; 142 assigned-clock-rates = <12288000>; 162 assigned-clock-rates = <12288000>; 178 assigned-clocks = <&clk_core CLK_SPDIF_DIV>; 179 assigned-clock-rates = <12288000>; 752 assigned-clock-rates = <4000000>, <32768>; 763 assigned-clock-rates = <4000000>, <32768>; 789 assigned-clock-rates = <0>, <50000000>; [all …]
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/linux/Documentation/devicetree/bindings/ufs/ |
A D | ti,j721e-ufs.yaml | 28 assigned-clocks: 31 assigned-clock-parents: 72 assigned-clocks = <&k3_clks 277 1>; 73 assigned-clock-parents = <&k3_clks 277 4>; 86 assigned-clocks = <&k3_clks 277 1>; 87 assigned-clock-parents = <&k3_clks 277 4>;
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/linux/Documentation/devicetree/bindings/media/i2c/ |
A D | ovti,ov5648.yaml | 23 assigned-clocks: 26 assigned-clock-rates: 71 - assigned-clocks 72 - assigned-clock-rates 96 assigned-clocks = <&ov5648_xvclk 0>; 97 assigned-clock-rates = <24000000>;
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A D | ovti,ov8865.yaml | 23 assigned-clocks: 26 assigned-clock-rates: 71 - assigned-clocks 72 - assigned-clock-rates 97 assigned-clocks = <&ccu CLK_CSI_MCLK>; 98 assigned-clock-rates = <24000000>;
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A D | ovti,ov9282.yaml | 27 assigned-clocks: true 28 assigned-clock-parents: true 29 assigned-clock-rates: true 78 assigned-clocks = <&ov9282_clk>; 79 assigned-clock-parents = <&ov9282_clk_parent>; 80 assigned-clock-rates = <24000000>;
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A D | sony,imx334.yaml | 27 assigned-clocks: true 28 assigned-clock-parents: true 29 assigned-clock-rates: true 77 assigned-clocks = <&imx334_clk>; 78 assigned-clock-parents = <&imx334_clk_parent>; 79 assigned-clock-rates = <24000000>;
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A D | sony,imx335.yaml | 27 assigned-clocks: true 28 assigned-clock-parents: true 29 assigned-clock-rates: true 78 assigned-clocks = <&imx335_clk>; 79 assigned-clock-parents = <&imx335_clk_parent>; 80 assigned-clock-rates = <24000000>;
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A D | sony,imx412.yaml | 27 assigned-clocks: true 28 assigned-clock-parents: true 29 assigned-clock-rates: true 78 assigned-clocks = <&imx412_clk>; 79 assigned-clock-parents = <&imx412_clk_parent>; 80 assigned-clock-rates = <24000000>;
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