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Searched refs:aud_clks (Results 1 – 11 of 11) sorted by relevance

/linux/sound/soc/mediatek/mt8183/
A Dmt8183-afe-clk.c54 static const char *aud_clks[CLK_NUM] = { variable
106 __func__, aud_clks[i], in mt8183_init_clock()
138 __func__, aud_clks[CLK_MUX_AUDIO], in mt8183_afe_enable_clock()
139 aud_clks[CLK_CLK26M], ret); in mt8183_afe_enable_clock()
273 aud_clks[CLK_CLK26M], ret); in apll1_mux_setting()
283 aud_clks[CLK_CLK26M], ret); in apll1_mux_setting()
347 aud_clks[CLK_CLK26M], ret); in apll2_mux_setting()
357 aud_clks[CLK_CLK26M], ret); in apll2_mux_setting()
568 __func__, aud_clks[m_sel_id], in mt8183_mck_enable()
569 aud_clks[apll_clk_id], ret); in mt8183_mck_enable()
[all …]
/linux/sound/soc/mediatek/mt8192/
A Dmt8192-afe-clk.c17 static const char *aud_clks[CLK_NUM] = { variable
74 aud_clks[clk_id], ret); in mt8192_set_audio_int_bus_parent()
97 aud_clks[CLK_TOP_APLL1_CK], ret); in apll1_mux_setting()
122 aud_clks[CLK_CLK26M], ret); in apll1_mux_setting()
132 aud_clks[CLK_CLK26M], ret); in apll1_mux_setting()
184 aud_clks[CLK_CLK26M], ret); in apll2_mux_setting()
194 aud_clks[CLK_CLK26M], ret); in apll2_mux_setting()
236 aud_clks[CLK_CLK26M], ret); in mt8192_afe_enable_clock()
251 aud_clks[CLK_CLK26M], ret); in mt8192_afe_enable_clock()
588 __func__, aud_clks[m_sel_id], in mt8192_mck_enable()
[all …]
/linux/sound/soc/mediatek/mt6797/
A Dmt6797-afe-clk.c24 static const char *aud_clks[CLK_NUM] = { variable
45 afe_priv->clk[i] = devm_clk_get(afe->dev, aud_clks[i]); in mt6797_init_clock()
48 __func__, aud_clks[i], in mt6797_init_clock()
65 __func__, aud_clks[CLK_INFRA_SYS_AUD], ret); in mt6797_afe_enable_clock()
72 __func__, aud_clks[CLK_INFRA_SYS_AUD_26M], ret); in mt6797_afe_enable_clock()
79 __func__, aud_clks[CLK_TOP_MUX_AUD], ret); in mt6797_afe_enable_clock()
87 __func__, aud_clks[CLK_TOP_MUX_AUD], in mt6797_afe_enable_clock()
88 aud_clks[CLK_CLK26M], ret); in mt6797_afe_enable_clock()
95 __func__, aud_clks[CLK_TOP_MUX_AUD_BUS], ret); in mt6797_afe_enable_clock()
/linux/drivers/clk/mediatek/
A Dclk-mt8167-aud.c35 static const struct mtk_gate aud_clks[] __initconst = { variable
58 mtk_clk_register_gates(node, aud_clks, ARRAY_SIZE(aud_clks), clk_data); in mtk_audsys_init()
A Dclk-mt8516-aud.c34 static const struct mtk_gate aud_clks[] __initconst = { variable
57 mtk_clk_register_gates(node, aud_clks, ARRAY_SIZE(aud_clks), clk_data); in mtk_audsys_init()
A Dclk-mt8192-aud.c42 static const struct mtk_gate aud_clks[] = { variable
90 r = mtk_clk_register_gates(node, aud_clks, ARRAY_SIZE(aud_clks), clk_data); in clk_mt8192_aud_probe()
/linux/sound/soc/mediatek/mt8195/
A Dmt8195-audsys-clk.c60 static const struct afe_gate aud_clks[CLK_AUD_NR_CLK] = { variable
165 for (i = 0; i < ARRAY_SIZE(aud_clks); i++) { in mt8195_audsys_clk_register()
166 const struct afe_gate *gate = &aud_clks[i]; in mt8195_audsys_clk_register()
A Dmt8195-afe-clk.c17 static const char *aud_clks[MT8195_CLK_NUM] = { variable
127 afe_priv->clk[i] = devm_clk_get(afe->dev, aud_clks[i]); in mt8195_afe_init_clock()
130 __func__, aud_clks[i], in mt8195_afe_init_clock()
/linux/sound/soc/mediatek/mt8173/
A Dmt8173-afe-pcm.c690 static const char *aud_clks[MT8173_CLK_NUM] = { variable
1038 for (i = 0; i < ARRAY_SIZE(aud_clks); i++) { in mt8173_afe_init_audio_clk()
1039 afe_priv->clocks[i] = devm_clk_get(afe->dev, aud_clks[i]); in mt8173_afe_init_audio_clk()
1042 __func__, aud_clks[i]); in mt8173_afe_init_audio_clk()
/linux/
A DSystem.map126411 ffff800011876320 d aud_clks
A D.tmp_System.map126411 ffff800011876320 d aud_clks

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