bXBTxAGC (reference) in projects: linux

Searched refs:bXBTxAGC (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/staging/rtl8192u/
A D	r819xU_phyreg.h	`110 #define bXBTxAGC 0xf00 macro`
A D	r819xU_phy.c	`803 rtl8192_setBBreg(dev, rFPGA0_TxGainStage, (bXBTxAGC\|bXCTxAGC), in rtl8192_BB_Config_ParaFile()`
/linux/drivers/staging/rtl8192e/rtl8192e/
A D	r8192E_phyreg.h	`281 #define bXBTxAGC 0xf00 macro`
A D	r8192E_phy.c	`568 (bXBTxAGC\|bXCTxAGC\|bXDTxAGC), dwRegValue); in _rtl92e_bb_config_para_file() 651 (bXBTxAGC\|bXCTxAGC\|bXDTxAGC), in rtl92e_set_tx_power()`
/linux/drivers/staging/rtl8712/
A D	rtl871x_mp_phy_regdef.h	`443 #define bXBTxAGC 0xf00 /* Reg 80c rFPGA0_TxGainStage */ macro`
A D	rtl871x_mp.c	`320 (bXBTxAGC \| bXCTxAGC \| bXDTxAGC), tmpAGC); in r8712_SetTxAGCOffset()`
/linux/drivers/staging/rtl8723bs/include/
A D	Hal8192CPhyReg.h	`527 #define bXBTxAGC 0xf00 /* Reg 80c rFPGA0_TxGainStage */ macro`
/linux/drivers/staging/r8188eu/include/
A D	Hal8188EPhyReg.h	`498 #define bXBTxAGC 0xf00 /* Reg 80c rFPGA0_TxGainStage */ macro`

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