| /linux/drivers/gpio/ |
| A D | gpio-omap.c | 83 #define BANK_USED(bank) (bank->mod_usage || bank->irq_usage) argument
111 bank->context.oe = omap_gpio_rmw(bank->base + bank->regs->direction, in omap_set_gpio_direction()
138 bank->context.dataout = omap_gpio_rmw(bank->base + bank->regs->dataout, in omap_set_gpio_dataout_mask()
149 bank->base + bank->regs->debounce_en); in omap_gpio_dbck_enable()
245 bank->base + bank->regs->debounce_en); in omap_clear_gpio_debounce()
833 reg = bank->base + bank->regs->datain; in omap_gpio_get()
835 reg = bank->base + bank->regs->dataout; in omap_gpio_get()
847 bank->set_dataout(bank, offset, value); in omap_gpio_output()
926 bank->set_dataout(bank, offset, value); in omap_gpio_set()
983 bank->context.oe = readl_relaxed(bank->base + bank->regs->direction); in omap_gpio_mod_init()
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| A D | gpio-rockchip.c | 180 data = readl(bank->reg_base + bank->gpio_regs->ext_port); in rockchip_gpio_get()
198 if (bank->gpio_type == GPIO_TYPE_V2 && !IS_ERR(bank->db_clk)) { in rockchip_gpio_set_debounce()
328 dev_dbg(bank->dev, "got irq for bank %s\n", bank->name); in rockchip_irq_demux()
428 data = readl(bank->reg_base + bank->gpio_regs->ext_port); in rockchip_irq_set_type()
501 bank->domain = irq_domain_add_linear(bank->of_node, 32, in rockchip_interrupts_register()
515 bank->name); in rockchip_interrupts_register()
633 bank->reg_base = devm_ioremap_resource(bank->dev, &res); in rockchip_get_bank_data()
637 bank->irq = irq_of_parse_and_map(bank->of_node, 0); in rockchip_get_bank_data()
641 bank->clk = of_clk_get(bank->of_node, 0); in rockchip_get_bank_data()
652 bank->db_clk = of_clk_get(bank->of_node, 1); in rockchip_get_bank_data()
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| A D | gpio-brcmstb.c | 37 #define GIO_ODEN(bank) GIO_BANK_OFF(bank, GIO_REG_ODEN) argument
38 #define GIO_DATA(bank) GIO_BANK_OFF(bank, GIO_REG_DATA) argument
40 #define GIO_EC(bank) GIO_BANK_OFF(bank, GIO_REG_EC) argument
41 #define GIO_EI(bank) GIO_BANK_OFF(bank, GIO_REG_EI) argument
85 return bank->gc.read_reg(reg_base + GIO_STAT(bank->id)) & in __brcmstb_gpio_get_active_irqs()
86 bank->gc.read_reg(reg_base + GIO_MASK(bank->id)); in __brcmstb_gpio_get_active_irqs()
216 bank->gc.write_reg(priv->reg_base + GIO_EC(bank->id), in brcmstb_gpio_irq_set_type()
218 bank->gc.write_reg(priv->reg_base + GIO_EI(bank->id), in brcmstb_gpio_irq_set_type()
220 bank->gc.write_reg(priv->reg_base + GIO_LEVEL(bank->id), in brcmstb_gpio_irq_set_type()
340 if (!bank) in brcmstb_gpio_irq_map()
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| A D | gpio-f7188x.c | 78 struct f7188x_gpio_bank *bank; member
422 data->bank = f71869_gpio_bank; in f7188x_gpio_probe()
426 data->bank = f71869a_gpio_bank; in f7188x_gpio_probe()
430 data->bank = f71882_gpio_bank; in f7188x_gpio_probe()
438 data->bank = f71889_gpio_bank; in f7188x_gpio_probe()
442 data->bank = f81866_gpio_bank; in f7188x_gpio_probe()
446 data->bank = f81804_gpio_bank; in f7188x_gpio_probe()
450 data->bank = f81865_gpio_bank; in f7188x_gpio_probe()
461 struct f7188x_gpio_bank *bank = &data->bank[i]; in f7188x_gpio_probe() local
464 bank->data = data; in f7188x_gpio_probe()
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| A D | gpio-aspeed-sgpio.c | 111 return gpio->base + bank->rdata_reg; in bank_reg()
136 unsigned int bank; in to_bank() local
138 bank = GPIO_BANK(offset); in to_bank()
141 return &aspeed_sgpio_banks[bank]; in to_bank()
263 *bank = to_bank(*offset); in irqd_to_aspeed_sgpio_data()
269 const struct aspeed_sgpio_bank *bank; in aspeed_sgpio_irq_ack() local
289 const struct aspeed_sgpio_bank *bank; in aspeed_sgpio_irq_set_mask() local
328 const struct aspeed_sgpio_bank *bank; in aspeed_sgpio_set_type() local
408 const struct aspeed_sgpio_bank *bank; in aspeed_sgpio_setup_irqs() local
419 bank = &aspeed_sgpio_banks[i]; in aspeed_sgpio_setup_irqs()
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| /linux/drivers/pinctrl/renesas/ |
| A D | sh_pfc.h | 462 fn(bank, pin, GP_##bank##_##pin, sfx, cfg)
605 PORT_GP_1(bank, 31, fn, sfx), PORT_GP_1(bank, 30, fn, sfx), \
606 PORT_GP_1(bank, 29, fn, sfx), PORT_GP_1(bank, 28, fn, sfx), \
607 PORT_GP_1(bank, 27, fn, sfx), PORT_GP_1(bank, 26, fn, sfx), \
608 PORT_GP_1(bank, 25, fn, sfx), PORT_GP_1(bank, 24, fn, sfx), \
609 PORT_GP_1(bank, 23, fn, sfx), PORT_GP_1(bank, 22, fn, sfx), \
610 PORT_GP_1(bank, 21, fn, sfx), PORT_GP_1(bank, 20, fn, sfx), \
611 PORT_GP_1(bank, 19, fn, sfx), PORT_GP_1(bank, 18, fn, sfx), \
612 PORT_GP_1(bank, 17, fn, sfx), PORT_GP_1(bank, 16, fn, sfx), \
620 PORT_GP_1(bank, 1, fn, sfx), PORT_GP_1(bank, 0, fn, sfx)
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| /linux/drivers/pinctrl/samsung/ |
| A D | pinctrl-exynos.c | 258 bank += (group - 1); in exynos_eint_gpio_irq()
297 bank = d->pin_banks; in exynos_eint_gpio_init()
308 bank->irq_chip->chip.name = bank->name; in exynos_eint_gpio_init()
310 bank->irq_domain = irq_domain_add_linear(bank->of_node, in exynos_eint_gpio_init()
311 bank->nr_pins, &exynos_eint_irqd_ops, bank); in exynos_eint_gpio_init()
331 for (--i, --bank; i >= 0; --i, --bank) { in exynos_eint_gpio_init()
475 struct samsung_pin_bank *bank = eintd->bank; in exynos_irq_eint0_15() local
561 bank->irq_chip->chip.name = bank->name; in exynos_eint_wkup_init()
563 bank->irq_domain = irq_domain_add_linear(bank->of_node, in exynos_eint_wkup_init()
564 bank->nr_pins, &exynos_eint_irqd_ops, bank); in exynos_eint_wkup_init()
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| A D | pinctrl-samsung.c | 371 if (bank) in pin_to_reg_bank()
372 *bank = b; in pin_to_reg_bank()
394 type = bank->type; in samsung_pinmux_setup()
446 type = bank->type; in samsung_pinconf_rw()
549 reg = bank->pctl_base + bank->pctl_offset; in samsung_gpio_set_value()
577 reg = bank->pctl_base + bank->pctl_offset; in samsung_gpio_get()
602 reg = bank->pctl_base + bank->pctl_offset in samsung_gpio_set_direction()
893 for (bank = 0; bank < drvdata->nr_banks; bank++) { in samsung_pinctrl_register()
914 for (bank = 0; bank < drvdata->nr_banks; ++bank) { in samsung_pinctrl_register()
1155 void __iomem *reg = bank->pctl_base + bank->pctl_offset; in samsung_pinctrl_suspend()
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| A D | pinctrl-s3c24xx.c | 101 struct samsung_pin_bank *bank; member
408 struct samsung_pin_bank *bank = ddata->bank; in s3c24xx_gpf_irq_map() local
410 if (!(bank->eint_mask & (1 << (bank->eint_offset + hw)))) in s3c24xx_gpf_irq_map()
437 struct samsung_pin_bank *bank = ddata->bank; in s3c24xx_gpg_irq_map() local
439 if (!(bank->eint_mask & (1 << (bank->eint_offset + hw)))) in s3c24xx_gpg_irq_map()
507 bank = d->pin_banks; in s3c24xx_eint_init()
521 ddata->bank = bank; in s3c24xx_eint_init()
528 bank->irq_domain = irq_domain_add_linear(bank->of_node, in s3c24xx_eint_init()
530 if (!bank->irq_domain) { in s3c24xx_eint_init()
535 irq = bank->eint_offset; in s3c24xx_eint_init()
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| A D | pinctrl-s3c64xx.c | 463 bank = d->pin_banks; in s3c64xx_eint_gpio_init()
471 mask = bank->eint_mask; in s3c64xx_eint_gpio_init()
474 bank->irq_domain = irq_domain_add_linear(bank->of_node, in s3c64xx_eint_gpio_init()
490 bank = d->pin_banks; in s3c64xx_eint_gpio_init()
547 struct samsung_pin_bank *bank = ddata->bank; in s3c64xx_eint0_irq_set_type() local
655 struct samsung_pin_bank *bank = ddata->bank; in s3c64xx_eint0_irq_map() local
726 bank = d->pin_banks; in s3c64xx_eint_eint0_init()
737 mask = bank->eint_mask; in s3c64xx_eint_eint0_init()
744 ddata->bank = bank; in s3c64xx_eint_eint0_init()
746 bank->irq_domain = irq_domain_add_linear(bank->of_node, in s3c64xx_eint_eint0_init()
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| /linux/drivers/crypto/qat/qat_common/ |
| A D | adf_transport.c | 63 csr_ops->write_csr_int_col_en(bank->csr_addr, bank->bank_number, in adf_enable_ring_irq()
65 csr_ops->write_csr_int_col_ctl(bank->csr_addr, bank->bank_number, in adf_enable_ring_irq()
76 csr_ops->write_csr_int_col_en(bank->csr_addr, bank->bank_number, in adf_disable_ring_irq()
154 struct adf_etr_bank_data *bank = ring->bank; in adf_init_ring() local
260 ring->bank = bank; in adf_create_ring()
295 struct adf_etr_bank_data *bank = ring->bank; in adf_remove_ring() local
303 csr_ops->write_csr_ring_config(bank->csr_addr, bank->bank_number, in adf_remove_ring()
305 csr_ops->write_csr_ring_base(bank->csr_addr, bank->bank_number, in adf_remove_ring()
387 memset(bank, 0, sizeof(*bank)); in adf_init_bank()
397 if (!bank->rings) in adf_init_bank()
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| A D | adf_gen4_hw_data.h | 29 ADF_RING_BUNDLE_SIZE * (bank) + \
33 ADF_RING_BUNDLE_SIZE * (bank) + \
40 ADF_RING_BUNDLE_SIZE * (bank) + \
45 u32 _bank = bank; \
61 ADF_RING_BUNDLE_SIZE * (bank) + \
65 ADF_RING_BUNDLE_SIZE * (bank) + \
69 ADF_RING_BUNDLE_SIZE * (bank) + \
73 ADF_RING_BUNDLE_SIZE * (bank) + \
77 ADF_RING_BUNDLE_SIZE * (bank) + \
81 ADF_RING_BUNDLE_SIZE * (bank) + \
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| A D | adf_transport_debug.c | 44 struct adf_etr_bank_data *bank = ring->bank; in adf_ring_show() local
46 void __iomem *csr = ring->bank->csr_addr; in adf_ring_show()
61 ring->ring_number, ring->bank->bank_number); in adf_ring_show()
104 ring->bank->bank_debug_dir, in adf_ring_debugfs_add()
121 struct adf_etr_bank_data *bank = sfile->private; in adf_bank_start() local
152 bank->bank_number); in adf_bank_show()
156 void __iomem *csr = bank->csr_addr; in adf_bank_show()
159 if (!(bank->ring_mask & 1 << ring_id)) in adf_bank_show()
200 bank->bank_debug_dir, bank, in adf_bank_debugfs_add()
207 debugfs_remove(bank->bank_debug_cfg); in adf_bank_debugfs_rm()
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| A D | adf_gen4_hw_data.c | 13 return READ_CSR_RING_HEAD(csr_base_addr, bank, ring); in read_csr_ring_head()
19 WRITE_CSR_RING_HEAD(csr_base_addr, bank, ring, value); in write_csr_ring_head()
24 return READ_CSR_RING_TAIL(csr_base_addr, bank, ring); in read_csr_ring_tail()
30 WRITE_CSR_RING_TAIL(csr_base_addr, bank, ring, value); in write_csr_ring_tail()
35 return READ_CSR_E_STAT(csr_base_addr, bank); in read_csr_e_stat()
47 WRITE_CSR_RING_BASE(csr_base_addr, bank, ring, addr); in write_csr_ring_base()
53 WRITE_CSR_INT_FLAG(csr_base_addr, bank, value); in write_csr_int_flag()
58 WRITE_CSR_INT_SRCSEL(csr_base_addr, bank); in write_csr_int_srcsel()
63 WRITE_CSR_INT_COL_EN(csr_base_addr, bank, value); in write_csr_int_col_en()
69 WRITE_CSR_INT_COL_CTL(csr_base_addr, bank, value); in write_csr_int_col_ctl()
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| A D | adf_gen2_hw_data.h | 30 #define READ_CSR_RING_HEAD(csr_base_addr, bank, ring) \ argument
31 ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \
33 #define READ_CSR_RING_TAIL(csr_base_addr, bank, ring) \ argument
34 ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \
36 #define READ_CSR_E_STAT(csr_base_addr, bank) \ argument
37 ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \
40 ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \
59 #define WRITE_CSR_INT_FLAG(csr_base_addr, bank, value) \ argument
62 #define WRITE_CSR_INT_SRCSEL(csr_base_addr, bank) \ argument
69 #define WRITE_CSR_INT_COL_EN(csr_base_addr, bank, value) \ argument
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| /linux/drivers/pinctrl/stm32/ |
| A D | pinctrl-stm32.c | 200 clk_enable(bank->clk); in __stm32_gpio_set()
204 clk_disable(bank->clk); in __stm32_gpio_set()
233 clk_enable(bank->clk); in stm32_gpio_get()
237 clk_disable(bank->clk); in stm32_gpio_get()
471 bank); in stm32_gpio_domain_alloc()
753 clk_enable(bank->clk); in stm32_pmx_set_mode()
795 clk_enable(bank->clk); in stm32_pmx_get_mode()
870 clk_enable(bank->clk); in stm32_pconf_set_driving()
905 clk_enable(bank->clk); in stm32_pconf_get_driving()
1290 if (!bank->domain) in stm32_gpiolib_register_bank()
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| /linux/arch/x86/kernel/cpu/mce/ |
| A D | amd.c | 557 b.bank = bank; in prepare_threshold_block()
663 for (bank = 0; bank < this_cpu_read(mce_num_banks); ++bank) { in mce_amd_feature_init()
911 m.bank = bank; in __log_error()
998 _log_error_bank(bank, MSR_AMD64_SMCA_MCx_DESTAT(bank), in log_error_deferred()
1007 for (bank = 0; bank < this_cpu_read(mce_num_banks); ++bank) in amd_deferred_error_interrupt()
1013 _log_error_bank(bank, mca_msr_reg(bank, MCA_STATUS), mca_msr_reg(bank, MCA_ADDR), misc); in log_error_thresholding()
1057 for (bank = 0; bank < this_cpu_read(mce_num_banks); ++bank) { in amd_threshold_interrupt()
1274 b->bank = bank; in allocate_threshold_blocks()
1471 kfree(bank); in threshold_remove_bank()
1488 for (bank = 0; bank < numbanks; bank++) { in mce_threshold_remove_device()
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| /linux/drivers/net/phy/mscc/ |
| A D | mscc_macsec.c | 36 if (bank >> 2 == 0x1) in vsc8584_macsec_phy_read()
38 bank &= 0x3; in vsc8584_macsec_phy_read()
40 bank = 0; in vsc8584_macsec_phy_read()
74 if ((bank >> 2 == 0x1) || (bank >> 2 == 0x3)) in vsc8584_macsec_phy_write()
75 bank &= 0x3; in vsc8584_macsec_phy_write()
78 bank = 0; in vsc8584_macsec_phy_write()
374 enum macsec_bank bank = flow->bank; in vsc8584_macsec_flow() local
464 enum macsec_bank bank = flow->bank; in vsc8584_macsec_flow_enable() local
483 enum macsec_bank bank = flow->bank; in vsc8584_macsec_flow_disable() local
524 enum macsec_bank bank = flow->bank; in vsc8584_macsec_transformation() local
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| /linux/arch/arm/mach-s3c/ |
| A D | iotiming-s3c2412.c | 43 for (bank = 0; bank < MAX_BANKS; bank++) { in s3c2412_print_timing()
44 bt = iot->bank[bank].io_2412; in s3c2412_print_timing()
142 int bank; in s3c2412_iotiming_calc() local
145 for (bank = 0; bank < MAX_BANKS; bank++) { in s3c2412_iotiming_calc()
146 bt = iot->bank[bank].io_2412; in s3c2412_iotiming_calc()
176 int bank; in s3c2412_iotiming_set() local
180 for (bank = 0; bank < MAX_BANKS; bank++) { in s3c2412_iotiming_set()
181 bt = iot->bank[bank].io_2412; in s3c2412_iotiming_set()
222 if (bank < 2) in bank_is_io()
237 for (bank = 0; bank < MAX_BANKS; bank++) { in s3c2412_iotiming_get()
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| A D | iotiming-s3c2410.c | 35 int bank; in s3c2410_print_timing() local
37 for (bank = 0; bank < MAX_BANKS; bank++) { in s3c2410_print_timing()
38 bt = timings->bank[bank].io_2410; in s3c2410_print_timing()
362 int bank; in s3c2410_iotiming_calc() local
365 for (bank = 0; bank < MAX_BANKS; bank++) { in s3c2410_iotiming_calc()
367 bt = iot->bank[bank].io_2410; in s3c2410_iotiming_calc()
403 int bank; in s3c2410_iotiming_set() local
407 for (bank = 0; bank < MAX_BANKS; bank++) { in s3c2410_iotiming_set()
408 bt = iot->bank[bank].io_2410; in s3c2410_iotiming_set()
443 for (bank = 0; bank < MAX_BANKS; bank++) { in s3c2410_iotiming_get()
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| /linux/drivers/bus/ |
| A D | uniphier-system-bus.c | 45 bank, addr, paddr, size); in uniphier_system_bus_add_bank()
47 if (bank >= ARRAY_SIZE(priv->bank)) { in uniphier_system_bus_add_bank()
52 if (priv->bank[bank].base || priv->bank[bank].end) { in uniphier_system_bus_add_bank()
86 priv->bank[bank].base = paddr; in uniphier_system_bus_add_bank()
87 priv->bank[bank].end = end; in uniphier_system_bus_add_bank()
90 bank, priv->bank[bank].base, priv->bank[bank].end); in uniphier_system_bus_add_bank()
102 if (priv->bank[i].end > priv->bank[j].base && in uniphier_system_bus_check_overlap()
103 priv->bank[i].base < priv->bank[j].end) { in uniphier_system_bus_check_overlap()
130 swap(priv->bank[0], priv->bank[1]); in uniphier_system_bus_check_boot_swap()
141 base = priv->bank[i].base; in uniphier_system_bus_set_reg()
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| /linux/drivers/dma/ipu/ |
| A D | ipu_irq.c | 102 bank = map->bank; in ipu_irq_unmask()
103 if (!bank) { in ipu_irq_unmask()
109 reg = ipu_read_reg(bank->ipu, bank->control); in ipu_irq_unmask()
111 ipu_write_reg(bank->ipu, reg, bank->control); in ipu_irq_unmask()
125 bank = map->bank; in ipu_irq_mask()
126 if (!bank) { in ipu_irq_mask()
132 reg = ipu_read_reg(bank->ipu, bank->control); in ipu_irq_mask()
134 ipu_write_reg(bank->ipu, reg, bank->control); in ipu_irq_mask()
147 bank = map->bank; in ipu_irq_ack()
172 bank = map->bank; in ipu_irq_status()
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| /linux/drivers/pinctrl/ |
| A D | pinctrl-rockchip.c | 1459 if ((bank->bank_num == 0) || (bank->bank_num == 1)) { in rk3399_calc_pull_reg_and_bit()
1490 if ((bank->bank_num == 0) || (bank->bank_num == 1)) in rk3399_calc_drv_reg_and_bit()
2043 ret = rockchip_set_mux(bank, pins[cnt] - bank->pin_base, in rockchip_pmx_set()
2052 rockchip_set_mux(bank, pins[cnt] - bank->pin_base, 0); in rockchip_pmx_set()
2130 rc = rockchip_set_pull(bank, pin - bank->pin_base, in rockchip_pinconf_set()
2145 rc = rockchip_set_pull(bank, pin - bank->pin_base, in rockchip_pinconf_set()
2151 rc = rockchip_set_mux(bank, pin - bank->pin_base, in rockchip_pinconf_set()
2218 if (rockchip_get_pull(bank, pin - bank->pin_base) != param) in rockchip_pinconf_get()
2236 rc = rockchip_get_mux(bank, pin - bank->pin_base); in rockchip_pinconf_get()
2266 rc = rockchip_get_schmitt(bank, pin - bank->pin_base); in rockchip_pinconf_get()
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| /linux/drivers/pinctrl/sunxi/ |
| A D | pinctrl-sunxi.h | 33 PINCTRL_PIN(P ## bank ## _BASE + (pin), "P" #bank #pin)
237 u8 bank = pin / PINS_PER_BANK; in sunxi_mux_reg() local
252 u8 bank = pin / PINS_PER_BANK; in sunxi_data_reg() local
267 u8 bank = pin / PINS_PER_BANK; in sunxi_dlevel_reg() local
282 u8 bank = pin / PINS_PER_BANK; in sunxi_pull_reg() local
298 return bank; in sunxi_irq_hw_bank_num()
306 u8 bank = irq / IRQ_PER_BANK; in sunxi_irq_cfg_reg() local
327 u8 bank = irq / IRQ_PER_BANK; in sunxi_irq_ctrl_reg() local
353 u8 bank = irq / IRQ_PER_BANK; in sunxi_irq_status_reg() local
366 u8 bank = pin / PINS_PER_BANK; in sunxi_grp_config_reg() local
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| /linux/drivers/leds/ |
| A D | leds-tca6507.c | 162 struct bank { struct
167 } bank[3]; member
287 if (bank) { in set_code()
311 tca->bank[bank].level = level; in set_level()
320 result = choose_times(tca->bank[bank].ontime, &c1, &c2); in set_times()
326 c2, time_codes[c2], tca->bank[bank].ontime); in set_times()
329 tca->bank[bank].ontime = result; in set_times()
331 result = choose_times(tca->bank[bank].offtime, &c1, &c2); in set_times()
335 c2, time_codes[c2], tca->bank[bank].offtime); in set_times()
339 tca->bank[bank].offtime = result; in set_times()
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