| /linux/drivers/gpio/ |
| A D | gpio-xgene.c | 41 u32 bit_offset; in xgene_gpio_get() local
44 bit_offset = GPIO_BIT_OFFSET(offset); in xgene_gpio_get()
52 u32 setval, bit_offset; in __xgene_gpio_set() local
59 setval |= BIT(bit_offset); in __xgene_gpio_set()
61 setval &= ~BIT(bit_offset); in __xgene_gpio_set()
81 bit_offset = GPIO_BIT_OFFSET(offset); in xgene_gpio_get_direction()
93 u32 dirval, bit_offset; in xgene_gpio_dir_in() local
96 bit_offset = GPIO_BIT_OFFSET(offset); in xgene_gpio_dir_in()
101 dirval |= BIT(bit_offset); in xgene_gpio_dir_in()
114 u32 dirval, bit_offset; in xgene_gpio_dir_out() local
[all …]
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| /linux/drivers/pinctrl/ |
| A D | pinctrl-bm1880.c | 1029 _regval |= (0 << bit_offset); in bm1880_pinconf_drv_set()
1033 _regval |= (1 << bit_offset); in bm1880_pinconf_drv_set()
1037 _regval |= (2 << bit_offset); in bm1880_pinconf_drv_set()
1220 regval |= BIT(bit_offset); in bm1880_pinconf_cfg_set()
1224 regval |= BIT(bit_offset); in bm1880_pinconf_cfg_set()
1228 regval |= BIT(bit_offset); in bm1880_pinconf_cfg_set()
1233 regval |= BIT(bit_offset); in bm1880_pinconf_cfg_set()
1235 regval &= ~BIT(bit_offset); in bm1880_pinconf_cfg_set()
1240 regval |= BIT(bit_offset); in bm1880_pinconf_cfg_set()
1242 regval &= ~BIT(bit_offset); in bm1880_pinconf_cfg_set()
[all …]
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| /linux/tools/bpf/bpftool/ |
| A D | btf_dumper.c | 25 __u8 bit_offset, const void *data);
128 __u8 bit_offset, const void *data) in btf_dumper_modifier() argument
326 bits_to_copy = bit_offset + nr_bits; in btf_dumper_bitfield()
331 left_shift_bits = bit_offset; in btf_dumper_bitfield()
371 if (bit_offset || BTF_INT_OFFSET(*int_type) || in btf_dumper_int()
451 __u32 bit_offset = m[i].offset; in btf_dumper_struct() local
456 bit_offset = BTF_MEMBER_BIT_OFFSET(bit_offset); in btf_dumper_struct()
463 BITS_PER_BYTE_MASKED(bit_offset), in btf_dumper_struct()
467 BITS_PER_BYTE_MASKED(bit_offset), in btf_dumper_struct()
480 __u8 bit_offset, const void *data) in btf_dumper_var() argument
[all …]
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| /linux/drivers/acpi/acpica/ |
| A D | hwregs.c | 69 if (!reg->bit_offset && reg->bit_width && in acpi_hw_get_access_bit_width()
200 u8 bit_offset; in acpi_hw_read() local
221 bit_width = reg->bit_offset + reg->bit_width; in acpi_hw_read()
222 bit_offset = reg->bit_offset; in acpi_hw_read()
230 if (bit_offset >= access_width) { in acpi_hw_read()
232 bit_offset -= access_width; in acpi_hw_read()
295 u8 bit_offset; in acpi_hw_write() local
312 bit_width = reg->bit_offset + reg->bit_width; in acpi_hw_write()
313 bit_offset = reg->bit_offset; in acpi_hw_write()
328 if (bit_offset >= access_width) { in acpi_hw_write()
[all …]
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| A D | dsopcode.c | 83 u32 bit_offset; in acpi_ds_init_buffer_field() local
127 bit_offset = offset; in acpi_ds_init_buffer_field()
144 bit_offset = offset; in acpi_ds_init_buffer_field()
153 bit_offset = 8 * offset; in acpi_ds_init_buffer_field()
162 bit_offset = 8 * offset; in acpi_ds_init_buffer_field()
171 bit_offset = 8 * offset; in acpi_ds_init_buffer_field()
180 bit_offset = 8 * offset; in acpi_ds_init_buffer_field()
196 if ((bit_offset + bit_count) > (8 * (u32)buffer_desc->buffer.length)) { in acpi_ds_init_buffer_field()
202 bit_offset, bit_count, in acpi_ds_init_buffer_field()
214 bit_offset, bit_count); in acpi_ds_init_buffer_field()
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| /linux/arch/x86/kernel/acpi/ |
| A D | cppc_msr.c | 23 u64 mask = GENMASK_ULL(reg->bit_offset + reg->bit_width - 1, in cpc_read_ffh()
24 reg->bit_offset); in cpc_read_ffh()
27 *val >>= reg->bit_offset; in cpc_read_ffh()
39 u64 mask = GENMASK_ULL(reg->bit_offset + reg->bit_width - 1, in cpc_write_ffh()
40 reg->bit_offset); in cpc_write_ffh()
42 val <<= reg->bit_offset; in cpc_write_ffh()
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| /linux/drivers/soc/tegra/fuse/ |
| A D | fuse-tegra.c | 101 .bit_offset = 0,
107 .bit_offset = 0,
113 .bit_offset = 0,
119 .bit_offset = 0,
125 .bit_offset = 0,
131 .bit_offset = 0,
137 .bit_offset = 0,
143 .bit_offset = 0,
149 .bit_offset = 0,
155 .bit_offset = 0,
[all …]
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| /linux/tools/lib/bpf/ |
| A D | relo_core.c | 40 __u32 bit_offset; member
233 __u32 bit_offset; in bpf_core_parse_spec() local
239 spec->bit_offset += bit_offset; in bpf_core_parse_spec()
398 __u32 bit_offset; in bpf_core_match_member() local
407 spec->bit_offset += bit_offset; in bpf_core_match_member()
436 spec->bit_offset -= bit_offset; in bpf_core_match_member()
612 bit_off = spec->bit_offset; in bpf_core_calc_field_relo()
1086 if (spec->bit_offset % 8) in bpf_core_dump_spec()
1088 spec->bit_offset / 8, spec->bit_offset % 8); in bpf_core_dump_spec()
1230 } else if (cand_spec.bit_offset != targ_spec.bit_offset) { in bpf_core_apply_relo_insn()
[all …]
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| /linux/drivers/gpu/drm/nouveau/nvkm/subdev/bios/ |
| A D | bit.c | 30 if (likely(bios->bit_offset)) { in bit_entry()
31 u8 entries = nvbios_rd08(bios, bios->bit_offset + 10); in bit_entry()
32 u32 entry = bios->bit_offset + 12; in bit_entry()
42 entry += nvbios_rd08(bios, bios->bit_offset + 9); in bit_entry()
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| /linux/drivers/gpu/drm/omapdrm/ |
| A D | tcm-sita.c | 95 unsigned long bit_offset = (offset > 0) ? offset / slot_bytes : 0; in l2r_t2b() local
96 unsigned long curr_bit = bit_offset; in l2r_t2b()
109 if (bit_offset > 0 && (*pos % slots_per_band != bit_offset)) { in l2r_t2b()
110 curr_bit = ALIGN(*pos, slots_per_band) + bit_offset; in l2r_t2b()
116 curr_bit = ALIGN(*pos, slot_stride) + bit_offset; in l2r_t2b()
147 if (bit_offset > 0) in l2r_t2b()
148 curr_bit = ALIGN(*pos, slots_per_band) + bit_offset; in l2r_t2b()
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| /linux/drivers/net/wireless/ralink/rt2x00/ |
| A D | rt2x00reg.h | 148 u8 bit_offset; member
153 u16 bit_offset; member
158 u32 bit_offset; member
240 ((__field).bit_offset)) & \
248 ((__field).bit_offset); \
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| /linux/drivers/acpi/apei/ |
| A D | apei-base.c | 64 *val >>= entry->register_region.bit_offset; in __apei_exec_read_register()
104 val <<= entry->register_region.bit_offset; in __apei_exec_write_register()
110 valr &= ~(entry->mask << entry->register_region.bit_offset); in __apei_exec_write_register()
574 u32 bit_width, bit_offset, access_size_code, space_id; in apei_check_gar() local
577 bit_offset = reg->bit_offset; in apei_check_gar()
584 *paddr, bit_width, bit_offset, access_size_code, in apei_check_gar()
592 *paddr, bit_width, bit_offset, access_size_code, in apei_check_gar()
599 if (bit_width == 32 && bit_offset == 0 && (*paddr & 0x03) == 0 && in apei_check_gar()
606 if ((bit_width + bit_offset) > *access_bit_width) { in apei_check_gar()
609 *paddr, bit_width, bit_offset, access_size_code, in apei_check_gar()
[all …]
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| /linux/include/crypto/ |
| A D | sha1_base.h | 76 const int bit_offset = SHA1_BLOCK_SIZE - sizeof(__be64); in sha1_base_do_finalize() local
78 __be64 *bits = (__be64 *)(sctx->buffer + bit_offset); in sha1_base_do_finalize()
82 if (partial > bit_offset) { in sha1_base_do_finalize()
89 memset(sctx->buffer + partial, 0x0, bit_offset - partial); in sha1_base_do_finalize()
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| A D | sha256_base.h | 79 const int bit_offset = SHA256_BLOCK_SIZE - sizeof(__be64); in sha256_base_do_finalize() local
81 __be64 *bits = (__be64 *)(sctx->buf + bit_offset); in sha256_base_do_finalize()
85 if (partial > bit_offset) { in sha256_base_do_finalize()
92 memset(sctx->buf + partial, 0x0, bit_offset - partial); in sha256_base_do_finalize()
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| A D | sm3_base.h | 79 const int bit_offset = SM3_BLOCK_SIZE - sizeof(__be64); in sm3_base_do_finalize() local
81 __be64 *bits = (__be64 *)(sctx->buffer + bit_offset); in sm3_base_do_finalize()
85 if (partial > bit_offset) { in sm3_base_do_finalize()
92 memset(sctx->buffer + partial, 0x0, bit_offset - partial); in sm3_base_do_finalize()
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| A D | sha512_base.h | 99 const int bit_offset = SHA512_BLOCK_SIZE - sizeof(__be64[2]); in sha512_base_do_finalize() local
101 __be64 *bits = (__be64 *)(sctx->buf + bit_offset); in sha512_base_do_finalize()
105 if (partial > bit_offset) { in sha512_base_do_finalize()
112 memset(sctx->buf + partial, 0x0, bit_offset - partial); in sha512_base_do_finalize()
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| /linux/drivers/nvmem/ |
| A D | core.c | 53 int bit_offset; member
466 cell->bit_offset = info->bit_offset; in nvmem_cell_info_to_nvmem_cell_entry_nodup()
719 cell->nbits + cell->bit_offset, in nvmem_add_cells_from_of()
1401 int i, extra, bit_offset = cell->bit_offset; in nvmem_shift_read_buffer_in_place() local
1404 if (bit_offset) { in nvmem_shift_read_buffer_in_place()
1406 *b++ >>= bit_offset; in nvmem_shift_read_buffer_in_place()
1414 *b++ >>= bit_offset; in nvmem_shift_read_buffer_in_place()
1496 int i, rc, nbits, bit_offset = cell->bit_offset; in nvmem_cell_prepare_write_buffer() local
1507 if (bit_offset) { in nvmem_cell_prepare_write_buffer()
1509 *b <<= bit_offset; in nvmem_cell_prepare_write_buffer()
[all …]
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| /linux/drivers/irqchip/ |
| A D | irq-meson-gpio.c | 168 unsigned int bit_offset; in meson8_gpio_irq_sel_pin() local
171 bit_offset = REG_PIN_SEL_SHIFT(channel); in meson8_gpio_irq_sel_pin()
174 ctl->params->pin_sel_mask << bit_offset, in meson8_gpio_irq_sel_pin()
175 hwirq << bit_offset); in meson8_gpio_irq_sel_pin()
183 unsigned int bit_offset; in meson_a1_gpio_irq_sel_pin() local
185 bit_offset = ((channel % 2) == 0) ? 0 : 16; in meson_a1_gpio_irq_sel_pin()
189 ctl->params->pin_sel_mask << bit_offset, in meson_a1_gpio_irq_sel_pin()
190 hwirq << bit_offset); in meson_a1_gpio_irq_sel_pin()
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| /linux/sound/soc/codecs/ |
| A D | cs35l41.c | 304 int bit_offset, word_offset, ret, i; in cs35l41_otp_unpack() local
337 bit_offset = otp_map_match->bit_offset; in cs35l41_otp_unpack()
357 GENMASK(31, bit_offset)) >> in cs35l41_otp_unpack()
358 bit_offset; in cs35l41_otp_unpack()
360 GENMASK(bit_offset + in cs35l41_otp_unpack()
362 (32 - bit_offset); in cs35l41_otp_unpack()
363 bit_offset += otp_map[i].size - 32; in cs35l41_otp_unpack()
367 bit_offset)) >> bit_offset; in cs35l41_otp_unpack()
368 bit_offset += otp_map[i].size; in cs35l41_otp_unpack()
372 if (bit_offset == 32) { in cs35l41_otp_unpack()
[all …]
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| A D | cs35l41-tables.c | 563 .bit_offset = 16,
570 .bit_offset = 16,
577 .bit_offset = 16,
584 .bit_offset = 16,
591 .bit_offset = 16,
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| /linux/drivers/acpi/ |
| A D | processor_throttling.c | 462 throttling->control_register.bit_offset) > 32) { in acpi_processor_get_throttling_control()
469 throttling->status_register.bit_offset) > 32) { in acpi_processor_get_throttling_control()
754 u32 bit_width, bit_offset; in acpi_read_throttling_status() local
764 bit_offset = throttling->status_register.bit_offset; in acpi_read_throttling_status()
768 (u32) (bit_width + bit_offset)); in acpi_read_throttling_status()
770 *value = (u64) ((ptc_value >> bit_offset) & ptc_mask); in acpi_read_throttling_status()
786 u32 bit_width, bit_offset; in acpi_write_throttling_state() local
796 bit_offset = throttling->control_register.bit_offset; in acpi_write_throttling_state()
802 (u32) (ptc_value << bit_offset), in acpi_write_throttling_state()
803 (u32) (bit_width + bit_offset)); in acpi_write_throttling_state()
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| A D | acpi_lpit.c | 43 u64 mask = GENMASK_ULL(residency_info_ffh.gaddr.bit_offset + in lpit_read_residency_counter_us()
45 residency_info_ffh.gaddr.bit_offset); in lpit_read_residency_counter_us()
48 *counter >>= residency_info_ffh.gaddr.bit_offset; in lpit_read_residency_counter_us()
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| /linux/drivers/clk/imx/ |
| A D | clk-imx8qxp-lpcg.c | 183 unsigned int bit_offset[IMX_LPCG_MAX_CLKS]; in imx_lpcg_parse_clks_from_dt() local
223 ret = of_property_read_u32_array(np, "clock-indices", bit_offset, in imx_lpcg_parse_clks_from_dt()
250 idx = bit_offset[i] / 4; in imx_lpcg_parse_clks_from_dt()
260 bit_offset[i], false); in imx_lpcg_parse_clks_from_dt()
281 idx = bit_offset[i] / 4; in imx_lpcg_parse_clks_from_dt()
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| /linux/drivers/pinctrl/sprd/ |
| A D | pinctrl-sprd.h | 31 .bit_offset = (((a) >> BIT_OFFSET) & 0xff), \
48 unsigned long bit_offset; member
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| /linux/drivers/watchdog/ |
| A D | wdat_wdt.c | 147 x >>= gas->bit_offset; in wdat_wdt_run_action()
157 x >>= gas->bit_offset; in wdat_wdt_run_action()
165 x <<= gas->bit_offset; in wdat_wdt_run_action()
170 y = y & ~(mask << gas->bit_offset); in wdat_wdt_run_action()
181 x <<= gas->bit_offset; in wdat_wdt_run_action()
186 y = y & ~(mask << gas->bit_offset); in wdat_wdt_run_action()
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