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/linux/drivers/block/drbd/
A Ddrbd_vli.h215 struct bitstream { struct
226 static inline void bitstream_init(struct bitstream *bs, void *s, size_t len, unsigned int pad_bits) in bitstream_init() argument
234 static inline void bitstream_rewind(struct bitstream *bs) in bitstream_rewind()
248 static inline int bitstream_put_bits(struct bitstream *bs, u64 val, const unsigned int bits) in bitstream_put_bits()
281 static inline int bitstream_get_bits(struct bitstream *bs, u64 *out, int bits) in bitstream_get_bits()
328 static inline int vli_encode_bits(struct bitstream *bs, u64 in) in vli_encode_bits()
/linux/drivers/net/hamradio/
A Dhdlcdrv.c171 s->hdlcrx.bitstream >>= 16; in hdlcdrv_receiver()
172 s->hdlcrx.bitstream |= word << 16; in hdlcdrv_receiver()
181 if ((s->hdlcrx.bitstream & mask1) == mask1) in hdlcdrv_receiver()
183 else if ((s->hdlcrx.bitstream & mask2) == mask3) { in hdlcdrv_receiver()
196 } else if ((s->hdlcrx.bitstream & mask4) == mask5) { in hdlcdrv_receiver()
315 s->hdlctx.bitstream = 0; in hdlcdrv_transmitter()
327 s->hdlctx.bitstream >>= 8; in hdlcdrv_transmitter()
328 s->hdlctx.bitstream |= (*s->hdlctx.bp++) << 16; in hdlcdrv_transmitter()
335 if ((s->hdlctx.bitstream & mask1) != mask1) in hdlcdrv_transmitter()
337 s->hdlctx.bitstream &= ~mask2; in hdlcdrv_transmitter()
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A Dbaycom_epp.c380 bitstream = bitbuf = numbit = 0; in encode_hdlc()
382 bitstream >>= 8; in encode_hdlc()
383 bitstream |= ((unsigned int)*bp) << 8; in encode_hdlc()
385 notbitstream = ~bitstream; in encode_hdlc()
392 bitstream &= ~(0x100 << j); in encode_hdlc()
396 notbitstream = ~bitstream; in encode_hdlc()
563 bitstream = bc->hdlcrx.bitstream; in receive()
574 bitstream >>= 8; in receive()
575 bitstream |= (*cp) << 8; in receive()
579 notbitstream = ~bitstream; in receive()
[all …]
/linux/Documentation/ABI/testing/
A Dsysfs-driver-genwqe4 Description: Unique bitstream identification e.g.
21 Description: Currently active bitstream. 1 is default, 0 is backup.
26 Description: Interface to set the next bitstream to be used.
31 Description: Interface to trigger a PCIe card reset to reload the bitstream.
38 If successfully, the card will come back with the bitstream set
A Ddebugfs-driver-genwqe58 Description: Comprehensive summary of bitstream version and software
59 version. Used bitstream and bitstream clocking information.
A Dsysfs-devices-platform-stratix10-rsu34 0xF001 bitstream error
36 0xF003 bitstream corruption
A Dsysfs-class-fpga-manager44 error or incompatible bitstream image. The intent of this
/linux/drivers/media/platform/coda/
A Dcoda-bit.c217 ctx->bitstream.size); in coda_bitstream_flush()
260 ctx->bitstream.size) in coda_bitstream_try_queue()
1723 ctx->bitstream.vaddr, ctx->bitstream.size); in coda_seq_end_work()
1760 if (ctx->bitstream.vaddr) in coda_alloc_bitstream_buffer()
1764 ctx->bitstream.vaddr = dma_alloc_wc(ctx->dev->dev, ctx->bitstream.size, in coda_alloc_bitstream_buffer()
1766 if (!ctx->bitstream.vaddr) { in coda_alloc_bitstream_buffer()
1772 ctx->bitstream.vaddr, ctx->bitstream.size); in coda_alloc_bitstream_buffer()
1782 dma_free_wc(ctx->dev->dev, ctx->bitstream.size, ctx->bitstream.vaddr, in coda_free_bitstream_buffer()
1783 ctx->bitstream.paddr); in coda_free_bitstream_buffer()
1784 ctx->bitstream.vaddr = NULL; in coda_free_bitstream_buffer()
[all …]
/linux/Documentation/userspace-api/media/v4l/
A Dext-ctrls-codec-stateless.rst27 bitstream) for the associated H264 slice data. This includes the
29 pipeline for H264. The bitstream parameters are defined according
172 bitstream) for the associated H264 slice data. This includes the
278 the associated H264 slice data. The bitstream parameters are
314 for H264. The bitstream parameters are defined according to
525 for H264. The bitstream parameters are defined according to
920 The bitstream parameters are defined according to :ref:`vp8`.
1040 - Experimental bitstream.
1254 bitstream as specified by :ref:`mpeg2part2`.
1284 bitstream.
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A Dpixfmt-compressed.rst64 without the start code, as extracted from the H264 bitstream.
113 - MPEG-2 parsed slice data, as extracted from the MPEG-2 bitstream.
189 - HEVC parsed slice data, as extracted from the HEVC bitstream.
/linux/drivers/misc/genwqe/
A Dcard_debugfs.c287 u64 app_id, slu_id, bitstream = -1; in info_show() local
294 bitstream = __genwqe_readq(cd, IO_SLU_BITSTREAM); in info_show()
312 bitstream); in info_show()
A Dcard_utils.c705 u64 bitstream; in genwqe_read_softreset() local
710 bitstream = __genwqe_readq(cd, IO_SLU_BITSTREAM) & 0x1; in genwqe_read_softreset()
711 cd->softreset = (bitstream == 0) ? 0x8ull : 0xcull; in genwqe_read_softreset()
/linux/drivers/staging/gs_fpgaboot/
A DREADME28 - load Xilinx FPGA bitstream format[1] firmware image file using
69 2. bitstream file info:
/linux/include/linux/
A Dhdlcdrv.h111 unsigned int bitstream; member
131 unsigned int bitstream; member
/linux/Documentation/devicetree/bindings/media/
A Damlogic,gx-vdec.yaml16 except for the hardware bitstream parser that makes use of an undocumented
20 - ESPARSER is a bitstream parser that outputs to a VIFIFO. Further VDEC blocks
/linux/Documentation/staging/
A Dlzo.rst88 common case for zram. This modifies the bitstream in a backwards compatible way
105 17 : bitstream version. If the first byte is 17, and compressed
107 versioned bitstream), the next byte gives the bitstream version
109 Otherwise, the bitstream version is 0.
/linux/Documentation/devicetree/bindings/fpga/
A Dlattice-machxo2-spi.txt3 Lattice MachXO2 FPGAs support a method of loading the bitstream over
A Daltera-passive-serial.txt3 Altera FPGAs support a method of loading the bitstream over what is
A Dxilinx-slave-serial.txt4 bitstream over what is referred to as "slave serial" interface.
/linux/Documentation/devicetree/bindings/
A Dxilinx.txt15 to be recompiled every time the FPGA bitstream is resynthesized.
18 generate a new device tree each time the FPGA bitstream changes. The
108 bitstream stored on a CF card. It can also be used as a generic CF
/linux/Documentation/devicetree/bindings/sound/
A Dfsl,micfil.txt4 microphone bitstream in a configurable output sampling rate.
/linux/Documentation/fpga/
A Ddfl.rst90 - Program bitstream (DFL_FPGA_FME_PORT_PR)
99 Read bitstream ID (bitstream_id)
102 Read bitstream metadata (bitstream_metadata)
172 afu_id indicates which PR bitstream is programmed to this AFU.
227 reconfiguration of the PR bitstream to the given port.
244 reconfiguration of a PR bitstream file. The PR bitstream file must have been
248 comparing the compatibility ID noted in the header of PR bitstream file against
/linux/Documentation/devicetree/bindings/mips/img/
A Dxilfpga.txt76 When the example project bitstream is loaded, the cpu_reset button
/linux/Documentation/devicetree/bindings/ata/
A Dsata_highbank.yaml42 description: Maps port numbers to offsets within the SGPIO bitstream.
/linux/drivers/comedi/drivers/
A Dcb_pcidas64.c1690 u8 bitstream; in i2c_write() local
1705 bitstream = (address << 1) & ~read_bit; in i2c_write()
1706 i2c_write_byte(dev, bitstream); in i2c_write()
3519 unsigned int bitstream = ((address & 0x7) << 8) | value; in caldac_8800_write() local
3529 if (bitstream & bit) in caldac_8800_write()
3652 unsigned int bitstream = ((channel & 0x3) << 8) | (value & 0xff); in ad8402_write() local
3660 if (bitstream & bit) in ad8402_write()
3704 unsigned int bitstream = (read_command << 8) | address; in read_eeprom() local
3726 if (bitstream & bit) in read_eeprom()

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