1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /* Copyright(c) 2019-2020 Realtek Corporation
3 */
4
5 #ifndef __RTW89_COEX_H__
6 #define __RTW89_COEX_H__
7
8 #include "core.h"
9
10 enum btc_mode {
11 BTC_MODE_NORMAL,
12 BTC_MODE_WL,
13 BTC_MODE_BT,
14 BTC_MODE_WLOFF,
15 BTC_MODE_MAX
16 };
17
18 enum btc_wl_rfk_type {
19 BTC_WRFKT_IQK = 0,
20 BTC_WRFKT_LCK = 1,
21 BTC_WRFKT_DPK = 2,
22 BTC_WRFKT_TXGAPK = 3,
23 BTC_WRFKT_DACK = 4,
24 BTC_WRFKT_RXDCK = 5,
25 BTC_WRFKT_TSSI = 6,
26 };
27
28 #define NM_EXEC false
29 #define FC_EXEC true
30
31 #define RTW89_COEX_ACT1_WORK_PERIOD round_jiffies_relative(HZ * 4)
32 #define RTW89_COEX_BT_DEVINFO_WORK_PERIOD round_jiffies_relative(HZ * 16)
33 #define RTW89_COEX_RFK_CHK_WORK_PERIOD msecs_to_jiffies(300)
34 #define BTC_RFK_PATH_MAP GENMASK(3, 0)
35 #define BTC_RFK_PHY_MAP GENMASK(5, 4)
36 #define BTC_RFK_BAND_MAP GENMASK(7, 6)
37
38 enum btc_wl_rfk_state {
39 BTC_WRFK_STOP = 0,
40 BTC_WRFK_START = 1,
41 BTC_WRFK_ONESHOT_START = 2,
42 BTC_WRFK_ONESHOT_STOP = 3,
43 };
44
45 enum btc_pri {
46 BTC_PRI_MASK_RX_RESP = 0,
47 BTC_PRI_MASK_TX_RESP,
48 BTC_PRI_MASK_BEACON,
49 BTC_PRI_MASK_RX_CCK,
50 BTC_PRI_MASK_TX_MNGQ,
51 BTC_PRI_MASK_MAX,
52 };
53
54 enum btc_bt_trs {
55 BTC_BT_SS_GROUP = 0x0,
56 BTC_BT_TX_GROUP = 0x2,
57 BTC_BT_RX_GROUP = 0x3,
58 BTC_BT_MAX_GROUP,
59 };
60
61 enum btc_rssi_st {
62 BTC_RSSI_ST_LOW = 0x0,
63 BTC_RSSI_ST_HIGH,
64 BTC_RSSI_ST_STAY_LOW,
65 BTC_RSSI_ST_STAY_HIGH,
66 BTC_RSSI_ST_MAX
67 };
68
69 #define BTC_RSSI_HIGH(_rssi_) \
70 ({typeof(_rssi_) __rssi = (_rssi_); \
71 ((__rssi == BTC_RSSI_ST_HIGH || \
72 __rssi == BTC_RSSI_ST_STAY_HIGH) ? 1 : 0); })
73
74 #define BTC_RSSI_LOW(_rssi_) \
75 ({typeof(_rssi_) __rssi = (_rssi_); \
76 ((__rssi == BTC_RSSI_ST_LOW || \
77 __rssi == BTC_RSSI_ST_STAY_LOW) ? 1 : 0); })
78
79 #define BTC_RSSI_CHANGE(_rssi_) \
80 ({typeof(_rssi_) __rssi = (_rssi_); \
81 ((__rssi == BTC_RSSI_ST_LOW || \
82 __rssi == BTC_RSSI_ST_HIGH) ? 1 : 0); })
83
84 enum btc_ant {
85 BTC_ANT_SHARED = 0,
86 BTC_ANT_DEDICATED,
87 BTC_ANTTYPE_MAX
88 };
89
90 enum btc_bt_btg {
91 BTC_BT_ALONE = 0,
92 BTC_BT_BTG
93 };
94
95 enum btc_switch {
96 BTC_SWITCH_INTERNAL = 0,
97 BTC_SWITCH_EXTERNAL
98 };
99
100 enum btc_pkt_type {
101 PACKET_DHCP,
102 PACKET_ARP,
103 PACKET_EAPOL,
104 PACKET_EAPOL_END,
105 PACKET_ICMP,
106 PACKET_MAX
107 };
108
109 enum btc_bt_mailbox_id {
110 BTC_BTINFO_REPLY = 0x23,
111 BTC_BTINFO_AUTO = 0x27
112 };
113
114 enum btc_role_state {
115 BTC_ROLE_START,
116 BTC_ROLE_STOP,
117 BTC_ROLE_CHG_TYPE,
118 BTC_ROLE_MSTS_STA_CONN_START,
119 BTC_ROLE_MSTS_STA_CONN_END,
120 BTC_ROLE_MSTS_STA_DIS_CONN,
121 BTC_ROLE_MSTS_AP_START,
122 BTC_ROLE_MSTS_AP_STOP,
123 BTC_ROLE_STATE_UNKNOWN
124 };
125
126 enum btc_rfctrl {
127 BTC_RFCTRL_WL_OFF,
128 BTC_RFCTRL_WL_ON,
129 BTC_RFCTRL_FW_CTRL,
130 BTC_RFCTRL_MAX
131 };
132
133 void rtw89_btc_ntfy_poweron(struct rtw89_dev *rtwdev);
134 void rtw89_btc_ntfy_poweroff(struct rtw89_dev *rtwdev);
135 void rtw89_btc_ntfy_init(struct rtw89_dev *rtwdev, u8 mode);
136 void rtw89_btc_ntfy_scan_start(struct rtw89_dev *rtwdev, u8 phy_idx, u8 band);
137 void rtw89_btc_ntfy_scan_finish(struct rtw89_dev *rtwdev, u8 phy_idx);
138 void rtw89_btc_ntfy_switch_band(struct rtw89_dev *rtwdev, u8 phy_idx, u8 band);
139 void rtw89_btc_ntfy_specific_packet(struct rtw89_dev *rtwdev,
140 enum btc_pkt_type pkt_type);
141 void rtw89_btc_ntfy_eapol_packet_work(struct work_struct *work);
142 void rtw89_btc_ntfy_arp_packet_work(struct work_struct *work);
143 void rtw89_btc_ntfy_dhcp_packet_work(struct work_struct *work);
144 void rtw89_btc_ntfy_icmp_packet_work(struct work_struct *work);
145 void rtw89_btc_ntfy_role_info(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif,
146 struct rtw89_sta *rtwsta, enum btc_role_state state);
147 void rtw89_btc_ntfy_radio_state(struct rtw89_dev *rtwdev, enum btc_rfctrl rf_state);
148 void rtw89_btc_ntfy_wl_rfk(struct rtw89_dev *rtwdev, u8 phy_map,
149 enum btc_wl_rfk_type type,
150 enum btc_wl_rfk_state state);
151 void rtw89_btc_ntfy_wl_sta(struct rtw89_dev *rtwdev);
152 void rtw89_btc_c2h_handle(struct rtw89_dev *rtwdev, struct sk_buff *skb,
153 u32 len, u8 class, u8 func);
154 void rtw89_btc_dump_info(struct rtw89_dev *rtwdev, struct seq_file *m);
155 void rtw89_coex_act1_work(struct work_struct *work);
156 void rtw89_coex_bt_devinfo_work(struct work_struct *work);
157 void rtw89_coex_rfk_chk_work(struct work_struct *work);
158 void rtw89_coex_power_on(struct rtw89_dev *rtwdev);
159
rtw89_btc_phymap(struct rtw89_dev * rtwdev,enum rtw89_phy_idx phy_idx,enum rtw89_rf_path_bit paths)160 static inline u8 rtw89_btc_phymap(struct rtw89_dev *rtwdev,
161 enum rtw89_phy_idx phy_idx,
162 enum rtw89_rf_path_bit paths)
163 {
164 struct rtw89_hal *hal = &rtwdev->hal;
165 u8 phy_map;
166
167 phy_map = FIELD_PREP(BTC_RFK_PATH_MAP, paths) |
168 FIELD_PREP(BTC_RFK_PHY_MAP, BIT(phy_idx)) |
169 FIELD_PREP(BTC_RFK_BAND_MAP, hal->current_band_type);
170
171 return phy_map;
172 }
173
rtw89_btc_path_phymap(struct rtw89_dev * rtwdev,enum rtw89_phy_idx phy_idx,enum rtw89_rf_path path)174 static inline u8 rtw89_btc_path_phymap(struct rtw89_dev *rtwdev,
175 enum rtw89_phy_idx phy_idx,
176 enum rtw89_rf_path path)
177 {
178 return rtw89_btc_phymap(rtwdev, phy_idx, BIT(path));
179 }
180
181 #endif
182