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Searched refs:bw (Results 1 – 25 of 317) sorted by relevance

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/linux/drivers/net/wireless/broadcom/brcm80211/brcmutil/
A Dd11.c30 switch (bw) { in d11n_bw()
43 if (ch->bw == BRCMU_CHAN_BW_20) in brcmu_d11n_encchspec()
52 0, d11n_bw(ch->bw)); in brcmu_d11n_encchspec()
62 switch (bw) { in d11ac_bw()
87 0, d11ac_bw(ch->bw)); in brcmu_d11ac_encchspec()
105 ch->bw = BRCMU_CHAN_BW_20; in brcmu_d11n_decchspec()
109 ch->bw = BRCMU_CHAN_BW_40; in brcmu_d11n_decchspec()
146 ch->bw = BRCMU_CHAN_BW_20; in brcmu_d11ac_decchspec()
150 ch->bw = BRCMU_CHAN_BW_40; in brcmu_d11ac_decchspec()
163 ch->bw = BRCMU_CHAN_BW_80; in brcmu_d11ac_decchspec()
[all …]
/linux/net/ipv4/
A Dtcp_bbr.c258 u64 rate = bw; in bbr_bw_to_pacing_rate()
270 u64 bw; in bbr_init_pacing_rate_from_rtt() local
561 u32 inflight, bw; in bbr_is_next_cycle_phase() local
676 bbr->lt_bw = bw; in bbr_lt_bw_interval_done()
692 u64 bw; in bbr_lt_bw_sampling() local
755 do_div(bw, t); in bbr_lt_bw_sampling()
764 u64 bw; in bbr_update_bw() local
799 minmax_running_max(&bbr->bw, bbr_bw_rtts, bbr->rtt_cnt, bw); in bbr_update_bw()
1029 u32 bw; in bbr_main() local
1033 bw = bbr_bw(sk); in bbr_main()
[all …]
/linux/drivers/net/wireless/ath/ath11k/
A Dreg.c457 u16 bw; in ath11k_reg_adjust_bw() local
459 bw = end_freq - start_freq; in ath11k_reg_adjust_bw()
460 bw = min_t(u16, bw, max_bw); in ath11k_reg_adjust_bw()
462 if (bw >= 80 && bw < 160) in ath11k_reg_adjust_bw()
463 bw = 80; in ath11k_reg_adjust_bw()
464 else if (bw >= 40 && bw < 80) in ath11k_reg_adjust_bw()
465 bw = 40; in ath11k_reg_adjust_bw()
466 else if (bw < 40) in ath11k_reg_adjust_bw()
467 bw = 20; in ath11k_reg_adjust_bw()
469 return bw; in ath11k_reg_adjust_bw()
[all …]
A Ddebugfs_sta.c29 bw = ath11k_mac_mac80211_bw_to_ath11k_bw(txrate->bw); in ath11k_debugfs_sta_add_tx_stats()
85 STATS_OP_FMT(AMPDU).bw[0][bw] += in ath11k_debugfs_sta_add_tx_stats()
91 STATS_OP_FMT(AMPDU).bw[1][bw] += in ath11k_debugfs_sta_add_tx_stats()
101 STATS_OP_FMT(SUCC).bw[0][bw] += peer_stats->succ_bytes; in ath11k_debugfs_sta_add_tx_stats()
105 STATS_OP_FMT(SUCC).bw[1][bw] += peer_stats->succ_pkts; in ath11k_debugfs_sta_add_tx_stats()
109 STATS_OP_FMT(FAIL).bw[0][bw] += peer_stats->failed_bytes; in ath11k_debugfs_sta_add_tx_stats()
113 STATS_OP_FMT(FAIL).bw[1][bw] += peer_stats->failed_pkts; in ath11k_debugfs_sta_add_tx_stats()
121 STATS_OP_FMT(RETRY).bw[1][bw] += peer_stats->retry_pkts; in ath11k_debugfs_sta_add_tx_stats()
201 arsta->txrate.bw = ath11k_mac_bw_to_mac80211_bw(bw); in ath11k_debugfs_sta_update_txcompl()
267 stats->bw[j][0], stats->bw[j][1], in ath11k_dbg_sta_dump_tx_stats()
[all …]
/linux/drivers/media/dvb-frontends/
A Ddib7000m.c320 if (!bw) in dib7000m_set_bandwidth()
321 bw = 8000; in dib7000m_set_bandwidth()
324 state->current_bandwidth = bw; in dib7000m_set_bandwidth()
394 const struct dibx000_bandwidth_config *bw = state->cfg.bw; in dib7000m_reset_pll() local
398 reg_907 = (bw->pll_bypass << 15) | (bw->modulo << 7) | in dib7000m_reset_pll()
399 (bw->ADClkSrc << 6) | (bw->IO_CLK_en_core << 5) | (bw->bypclk_div << 2) | in dib7000m_reset_pll()
401 reg_910 = (((bw->pll_ratio >> 6) & 0x3) << 3) | (bw->pll_range << 1) | bw->pll_reset; in dib7000m_reset_pll()
427 const struct dibx000_bandwidth_config *bw = state->cfg.bw; in dib7000mc_reset_pll() local
431 dib7000m_write_word(state, 907, (bw->pll_prediv << 8) | (bw->pll_ratio << 0)); in dib7000mc_reset_pll()
436 (bw->IO_CLK_en_core << 10) | (bw->bypclk_div << 5) | (bw->enable_refdiv << 4) | in dib7000mc_reset_pll()
[all …]
A Ddib7000p.c378 state->current_bandwidth = bw; in dib7000p_set_bandwidth()
382 timf = state->cfg.bw->timf; in dib7000p_set_bandwidth()
388 timf = timf * (bw / 50) / 160; in dib7000p_set_bandwidth()
449 struct dibx000_bandwidth_config *bw = &state->cfg.bw[0]; in dib7000p_reset_pll() local
453 …dib7000p_write_word(state, 1856, (!bw->pll_reset << 13) | (bw->pll_range << 12) | (bw->pll_ratio <… in dib7000p_reset_pll()
462 …(bw->modulo << 7) | (bw->ADClkSrc << 6) | (bw->IO_CLK_en_core << 5) | (bw->bypclk_div << 2) | (bw-… in dib7000p_reset_pll()
467 …dib7000p_write_word(state, 903, (bw->pll_prediv << 5) | (((bw->pll_ratio >> 6) & 0x3) << 3) | (bw-… in dib7000p_reset_pll()
500 if ((bw != NULL) && (bw->pll_prediv != prediv || bw->pll_ratio != loopdiv)) { in dib7000p_update_pll()
506 …dib7000p_write_word(state, 1856, reg_1856 | ((bw->pll_ratio & 0x3f) << 6) | (bw->pll_prediv & 0x3f… in dib7000p_update_pll()
511 internal = 1000 * (xtal / bw->pll_prediv) * bw->pll_ratio; /* new internal */ in dib7000p_update_pll()
[all …]
/linux/drivers/net/wireless/realtek/rtw88/
A Dphy.c1616 u8 bw; in rtw_xref_txpwr_lmt_by_bw() local
1618 for (bw = RTW_CHANNEL_WIDTH_20; bw <= RTW_CHANNEL_WIDTH_40; bw++) in rtw_xref_txpwr_lmt_by_bw()
1648 u8 bw, rs; in rtw_cfg_txpwr_lmt_by_alt() local
1650 for (bw = 0; bw < RTW_CHANNEL_WIDTH_MAX; bw++) in rtw_cfg_txpwr_lmt_by_alt()
1653 bw, rs); in rtw_cfg_txpwr_lmt_by_alt()
2043 bw = min_t(u8, bw, RTW_CHANNEL_WIDTH_40); in rtw_phy_get_tx_power_limit()
2139 u8 bw; in rtw_phy_set_tx_power_index_by_rs() local
2151 bw, ch, regd); in rtw_phy_set_tx_power_index_by_rs()
2261 u8 regd, bw, rs; in rtw_phy_tx_power_limit_config() local
2267 for (bw = 0; bw < RTW_CHANNEL_WIDTH_MAX; bw++) in rtw_phy_tx_power_limit_config()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/dce112/
A Ddce112_resource.c902 &context->bw_ctx.bw.dce)) in dce112_validate_bandwidth()
910 if (memcmp(&dc->current_state->bw_ctx.bw.dce, in dce112_validate_bandwidth()
911 &context->bw_ctx.bw.dce, sizeof(context->bw_ctx.bw.dce))) { in dce112_validate_bandwidth()
927 context->bw_ctx.bw.dce.urgent_wm_ns[0].b_mark, in dce112_validate_bandwidth()
928 context->bw_ctx.bw.dce.urgent_wm_ns[0].a_mark, in dce112_validate_bandwidth()
943 context->bw_ctx.bw.dce.stutter_mode_enable, in dce112_validate_bandwidth()
947 context->bw_ctx.bw.dce.all_displays_in_sync, in dce112_validate_bandwidth()
948 context->bw_ctx.bw.dce.dispclk_khz, in dce112_validate_bandwidth()
949 context->bw_ctx.bw.dce.sclk_khz, in dce112_validate_bandwidth()
950 context->bw_ctx.bw.dce.sclk_deep_sleep_khz, in dce112_validate_bandwidth()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/core/
A Ddc_debug.c352 context->bw_ctx.bw.dcn.clk.dispclk_khz, in context_clock_trace()
353 context->bw_ctx.bw.dcn.clk.dppclk_khz, in context_clock_trace()
354 context->bw_ctx.bw.dcn.clk.dcfclk_khz, in context_clock_trace()
355 context->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz, in context_clock_trace()
356 context->bw_ctx.bw.dcn.clk.fclk_khz, in context_clock_trace()
357 context->bw_ctx.bw.dcn.clk.socclk_khz); in context_clock_trace()
360 context->bw_ctx.bw.dcn.clk.dispclk_khz, in context_clock_trace()
361 context->bw_ctx.bw.dcn.clk.dppclk_khz, in context_clock_trace()
362 context->bw_ctx.bw.dcn.clk.dcfclk_khz, in context_clock_trace()
364 context->bw_ctx.bw.dcn.clk.fclk_khz, in context_clock_trace()
[all …]
/linux/drivers/media/usb/dvb-usb-v2/
A Dmxl111sf-tuner.c79 u8 bw) in mxl111sf_calc_phy_tune_regs() argument
84 switch (bw) { in mxl111sf_calc_phy_tune_regs()
193 mxl_dbg("(freq = %d, bw = 0x%x)", freq, bw); in mxl1x1sf_tune_rf()
206 reg_ctrl_array = mxl111sf_calc_phy_tune_regs(freq, bw); in mxl1x1sf_tune_rf()
268 u8 bw; in mxl111sf_tuner_set_params() local
275 bw = 0; /* ATSC */ in mxl111sf_tuner_set_params()
278 bw = 1; /* US CABLE */ in mxl111sf_tuner_set_params()
283 bw = 6; in mxl111sf_tuner_set_params()
286 bw = 7; in mxl111sf_tuner_set_params()
289 bw = 8; in mxl111sf_tuner_set_params()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/
A Ddce110_clk_mgr.c183 context->bw_ctx.bw.dce.all_displays_in_sync; in dce11_pplib_apply_display_requirements()
185 context->bw_ctx.bw.dce.nbp_state_change_enable == false; in dce11_pplib_apply_display_requirements()
187 context->bw_ctx.bw.dce.cpuc_state_change_enable == false; in dce11_pplib_apply_display_requirements()
189 context->bw_ctx.bw.dce.cpup_state_change_enable == false; in dce11_pplib_apply_display_requirements()
191 context->bw_ctx.bw.dce.blackout_recovery_time_us; in dce11_pplib_apply_display_requirements()
205 pp_display_cfg->min_memory_clock_khz = context->bw_ctx.bw.dce.yclk_khz in dce11_pplib_apply_display_requirements()
211 context->bw_ctx.bw.dce.sclk_khz); in dce11_pplib_apply_display_requirements()
224 = context->bw_ctx.bw.dce.sclk_deep_sleep_khz; in dce11_pplib_apply_display_requirements()
255 int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz; in dce11_update_clocks()
270 context->bw_ctx.bw.dce.dispclk_khz = dce_set_clock(clk_mgr_base, patched_disp_clk); in dce11_update_clocks()
/linux/drivers/gpu/drm/amd/display/dc/dce110/
A Ddce110_resource.c980 &context->bw_ctx.bw.dce)) in dce110_validate_bandwidth()
990 if (memcmp(&dc->current_state->bw_ctx.bw.dce, in dce110_validate_bandwidth()
991 &context->bw_ctx.bw.dce, sizeof(context->bw_ctx.bw.dce))) { in dce110_validate_bandwidth()
1007 context->bw_ctx.bw.dce.urgent_wm_ns[0].b_mark, in dce110_validate_bandwidth()
1008 context->bw_ctx.bw.dce.urgent_wm_ns[0].a_mark, in dce110_validate_bandwidth()
1023 context->bw_ctx.bw.dce.stutter_mode_enable, in dce110_validate_bandwidth()
1027 context->bw_ctx.bw.dce.all_displays_in_sync, in dce110_validate_bandwidth()
1028 context->bw_ctx.bw.dce.dispclk_khz, in dce110_validate_bandwidth()
1029 context->bw_ctx.bw.dce.sclk_khz, in dce110_validate_bandwidth()
1030 context->bw_ctx.bw.dce.sclk_deep_sleep_khz, in dce110_validate_bandwidth()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/calcs/
A Ddcn_calcs.c631 context->bw_ctx.bw.dcn.watermarks.b = context->bw_ctx.bw.dcn.watermarks.a;
632 context->bw_ctx.bw.dcn.watermarks.c = context->bw_ctx.bw.dcn.watermarks.a;
635 context->bw_ctx.bw.dcn.watermarks.d = context->bw_ctx.bw.dcn.watermarks.a;
1172 context->bw_ctx.bw.dcn.watermarks.b = context->bw_ctx.bw.dcn.watermarks.a; in dcn_validate_bandwidth()
1173 context->bw_ctx.bw.dcn.watermarks.c = context->bw_ctx.bw.dcn.watermarks.a; in dcn_validate_bandwidth()
1174 context->bw_ctx.bw.dcn.watermarks.d = context->bw_ctx.bw.dcn.watermarks.a; in dcn_validate_bandwidth()
1188 if (context->bw_ctx.bw.dcn.clk.dispclk_khz < in dcn_validate_bandwidth()
1190 context->bw_ctx.bw.dcn.clk.dispclk_khz = in dcn_validate_bandwidth()
1194 context->bw_ctx.bw.dcn.clk.dppclk_khz = context->bw_ctx.bw.dcn.clk.dispclk_khz / in dcn_validate_bandwidth()
1199 context->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz = in dcn_validate_bandwidth()
[all …]
/linux/drivers/net/ethernet/intel/ice/
A Dice_sched.c2956 bw_t_info->cir_bw.bw = 0; in ice_set_clear_cir_bw()
2960 bw_t_info->cir_bw.bw = bw; in ice_set_clear_cir_bw()
2975 bw_t_info->eir_bw.bw = 0; in ice_set_clear_eir_bw()
2985 bw_t_info->eir_bw.bw = bw; in ice_set_clear_eir_bw()
3007 bw_t_info->eir_bw.bw = 0; in ice_set_clear_shared_bw()
3113 if (bw < ICE_SCHED_MIN_BW || bw > ICE_SCHED_MAX_BW) in ice_sched_bw_to_rl_profile()
3205 profile_type && rl_prof_elem->bw == bw) in ice_sched_add_rl_profile()
3220 rl_prof_elem->bw = bw; in ice_sched_add_rl_profile()
3641 bw); in ice_sched_set_node_bw_lmt()
3802 bw); in ice_cfg_q_bw_lmt()
[all …]
/linux/drivers/net/wireless/mediatek/mt7601u/
A Dphy.c278 if (dev->bw != MT_BW_20) in mt7601u_set_bw_filter()
319 t[dev->bw].regs, t[dev->bw].n); in mt7601u_bbp_temp()
377 u8 bw; in __mt7601u_phy_set_channel() local
380 bw = MT_BW_20; in __mt7601u_phy_set_channel()
385 bw = MT_BW_40; in __mt7601u_phy_set_channel()
395 if (bw != dev->bw || chan_ext_below != dev->chan_ext_below) { in __mt7601u_phy_set_channel()
397 bw, chan_ext_below); in __mt7601u_phy_set_channel()
423 mt7601u_bbp_set_bw(dev, bw); in __mt7601u_phy_set_channel()
840 if (dev->bw == MT_BW_20) in mt7601u_tssi_params_get()
1181 if (bw == dev->bw) { in mt7601u_bbp_set_bw()
[all …]
/linux/drivers/net/wireless/ath/carl9170/
A Dphy.c975 switch (bw) { in carl9170_init_rf_bank4_pwr()
1036 enum carl9170_bw bw) in carl9170_get_hw_dyn_params() argument
1271 if (bw == CARL9170_BW_40_BELOW || bw == CARL9170_BW_40_ABOVE) in carl9170_get_heavy_clip()
1366 freq, bw, EDGES(ctl_idx, 1)); in carl9170_calc_ctl()
1372 if (bw == CARL9170_BW_40_BELOW) in carl9170_calc_ctl()
1429 enum carl9170_bw bw) in carl9170_set_power_cal() argument
1524 carl9170_calc_ctl(ar, freq, bw); in carl9170_set_power_cal()
1578 enum carl9170_bw bw; in carl9170_set_channel() local
1581 bw = nl80211_to_carl(_bw); in carl9170_set_channel()
1625 channel->center_freq, bw); in carl9170_set_channel()
[all …]
/linux/drivers/media/tuners/
A Dmxl5007t.c374 enum mxl5007t_bw_mhz bw) in mxl5007t_set_bw_bits() argument
378 switch (bw) { in mxl5007t_set_bw_bits()
407 mxl5007t_set_bw_bits(state, bw); in mxl5007t_calc_rf_tune_regs()
521 enum mxl5007t_bw_mhz bw) in mxl5007t_tuner_rf_tune() argument
595 enum mxl5007t_bw_mhz bw; in mxl5007t_set_params() local
603 bw = MxL_BW_6MHz; in mxl5007t_set_params()
607 bw = MxL_BW_6MHz; in mxl5007t_set_params()
614 bw = MxL_BW_6MHz; in mxl5007t_set_params()
617 bw = MxL_BW_7MHz; in mxl5007t_set_params()
620 bw = MxL_BW_8MHz; in mxl5007t_set_params()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/dcn31/
A Ddcn31_resource.c1871 context->bw_ctx.bw.dcn.clk.dcfclk_khz = dcfclk; // always should be vlevel 0 in dcn31_calculate_wm_and_dlg_fp()
1892 …context->bw_ctx.bw.dcn.watermarks.b.urgent_ns = get_wm_urgent(&context->bw_ctx.dml, pipes, pipe_cn… in dcn31_calculate_wm_and_dlg_fp()
1901 …context->bw_ctx.bw.dcn.watermarks.b.urgent_latency_ns = get_urgent_latency(&context->bw_ctx.dml, p… in dcn31_calculate_wm_and_dlg_fp()
1914 …context->bw_ctx.bw.dcn.watermarks.c.urgent_ns = get_wm_urgent(&context->bw_ctx.dml, pipes, pipe_cn… in dcn31_calculate_wm_and_dlg_fp()
1923 …context->bw_ctx.bw.dcn.watermarks.c.urgent_latency_ns = get_urgent_latency(&context->bw_ctx.dml, p… in dcn31_calculate_wm_and_dlg_fp()
1933 …context->bw_ctx.bw.dcn.watermarks.d.urgent_ns = get_wm_urgent(&context->bw_ctx.dml, pipes, pipe_cn… in dcn31_calculate_wm_and_dlg_fp()
1942 …context->bw_ctx.bw.dcn.watermarks.d.urgent_latency_ns = get_urgent_latency(&context->bw_ctx.dml, p… in dcn31_calculate_wm_and_dlg_fp()
1951 …context->bw_ctx.bw.dcn.watermarks.a.urgent_ns = get_wm_urgent(&context->bw_ctx.dml, pipes, pipe_cn… in dcn31_calculate_wm_and_dlg_fp()
1962 context->bw_ctx.bw.dcn.watermarks.b = context->bw_ctx.bw.dcn.watermarks.a; in dcn31_calculate_wm_and_dlg_fp()
1963 context->bw_ctx.bw.dcn.watermarks.c = context->bw_ctx.bw.dcn.watermarks.a; in dcn31_calculate_wm_and_dlg_fp()
[all …]
/linux/drivers/net/wireless/mediatek/mt76/mt76x2/
A Dusb_phy.c87 u8 channel = chan->hw_value, bw, bw_index; in mt76x2u_phy_set_channel() local
96 bw = 1; in mt76x2u_phy_set_channel()
110 bw = 2; in mt76x2u_phy_set_channel()
115 bw = 0; in mt76x2u_phy_set_channel()
123 mt76x2_configure_tx_delay(dev, chan->band, bw); in mt76x2u_phy_set_channel()
137 ret = mt76x2_mcu_set_channel(dev, channel, bw, bw_index, scan); in mt76x2u_phy_set_channel()
A Dmcu.c15 int mt76x2_mcu_set_channel(struct mt76x02_dev *dev, u8 channel, u8 bw, in mt76x2_mcu_set_channel() argument
21 u8 bw; in mt76x2_mcu_set_channel() member
31 .bw = bw, in mt76x2_mcu_set_channel()
/linux/net/mac80211/
A Dairtime.c413 int bw, streams; in ieee80211_get_rate_duration() local
417 switch (status->bw) { in ieee80211_get_rate_duration()
419 bw = BW_20; in ieee80211_get_rate_duration()
422 bw = BW_40; in ieee80211_get_rate_duration()
425 bw = BW_80; in ieee80211_get_rate_duration()
428 bw = BW_160; in ieee80211_get_rate_duration()
516 stat->bw = ri->bw; in ieee80211_fill_rate_info()
564 stat->bw = RATE_INFO_BW_160; in ieee80211_fill_rx_status()
566 stat->bw = RATE_INFO_BW_80; in ieee80211_fill_rx_status()
568 stat->bw = RATE_INFO_BW_40; in ieee80211_fill_rx_status()
[all …]
/linux/include/net/
A Dregulatory.h234 #define REG_RULE_EXT(start, end, bw, gain, eirp, dfs_cac, reg_flags) \ argument
238 .freq_range.max_bandwidth_khz = MHZ_TO_KHZ(bw), \
245 #define REG_RULE(start, end, bw, gain, eirp, reg_flags) \ argument
246 REG_RULE_EXT(start, end, bw, gain, eirp, 0, reg_flags)
/linux/drivers/memory/samsung/
A Dexynos-srom.c72 u32 cs, bw; in exynos_srom_configure_bank() local
90 bw = readl_relaxed(srom->reg_base + EXYNOS_SROM_BW); in exynos_srom_configure_bank()
91 bw = (bw & ~(EXYNOS_SROM_BW__CS_MASK << bank)) | (cs << bank); in exynos_srom_configure_bank()
92 writel_relaxed(bw, srom->reg_base + EXYNOS_SROM_BW); in exynos_srom_configure_bank()
/linux/drivers/net/wireless/marvell/mwifiex/
A Dcfp.c201 u8 bw = 0; in mwifiex_index_to_acs_data_rate() local
208 bw = (ht_info & 0xC) >> 2; in mwifiex_index_to_acs_data_rate()
214 rate = ac_mcs_rate_nss2[2 * (3 - bw) + gi][mcs_index]; in mwifiex_index_to_acs_data_rate()
216 rate = ac_mcs_rate_nss1[2 * (3 - bw) + gi][mcs_index]; in mwifiex_index_to_acs_data_rate()
219 bw = (ht_info & 0xC) >> 2; in mwifiex_index_to_acs_data_rate()
230 if ((bw == 1) || (bw == 0)) in mwifiex_index_to_acs_data_rate()
231 rate = mcs_rate[2 * (1 - bw) + gi][index]; in mwifiex_index_to_acs_data_rate()
/linux/drivers/gpu/drm/nouveau/nvkm/engine/disp/
A Ddp.c240 ior->dp.nr, ior->dp.bw * 27); in nvkm_dp_train_links()
249 while (ior->dp.bw < nvbios_rd08(bios, lnkcmp)) in nvkm_dp_train_links()
267 while (ior->dp.bw < nvbios_rd08(bios, lnkcmp)) in nvkm_dp_train_links()
291 sink[0] = ior->dp.bw; in nvkm_dp_train_links()
350 u8 bw; member
389 if (cfg->nr <= outp_nr && cfg->bw <= outp_bw) { in nvkm_dp_train()
416 failsafe->nr, failsafe->bw * 27); in nvkm_dp_train()
420 if ((cfg->nr > outp_nr || cfg->bw > outp_bw || in nvkm_dp_train()
421 cfg->nr > sink_nr || cfg->bw > sink_bw)) { in nvkm_dp_train()
428 ior->dp.bw = cfg->bw; in nvkm_dp_train()
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