| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/ |
| A D | dcn30_clk_mgr.c | 170 if (!clk_mgr_base->bw_params) in dcn3_init_clocks()
185 &clk_mgr_base->bw_params->clk_table.entries[0].dcfclk_mhz, in dcn3_init_clocks()
190 &clk_mgr_base->bw_params->clk_table.entries[0].dtbclk_mhz, in dcn3_init_clocks()
206 &clk_mgr_base->bw_params->clk_table.entries[0].dppclk_mhz, in dcn3_init_clocks()
211 &clk_mgr_base->bw_params->clk_table.entries[0].phyclk_mhz, in dcn3_init_clocks()
308 …clk_mgr_base->bw_params->clk_table.entries[clk_mgr_base->bw_params->clk_table.num_entries - 1].mem… in dcn3_update_clocks()
405 …clk_mgr_base->bw_params->clk_table.entries[clk_mgr_base->bw_params->clk_table.num_entries - 1].mem… in dcn3_set_hard_min_memclk()
421 …clk_mgr_base->bw_params->clk_table.entries[clk_mgr_base->bw_params->clk_table.num_entries - 1].mem… in dcn3_set_hard_max_memclk()
441 clk_mgr->base.ctx->dc, clk_mgr_base->bw_params); in dcn3_get_memclk_states_from_smu()
579 clk_mgr->base.bw_params = kzalloc(sizeof(*clk_mgr->base.bw_params), GFP_KERNEL); in dcn3_clk_mgr_construct()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/ |
| A D | dcn31_clk_mgr.c | 418 if (!bw_params->wm_table.entries[i].valid) in dcn31_build_watermark_ranges()
436 bw_params->clk_table.entries[i].dcfclk_mhz; in dcn31_build_watermark_ranges()
550 struct clk_bw_params *bw_params = clk_mgr->base.bw_params; in dcn31_clk_mgr_helper_populate_bw_params() local
572 bw_params->clk_table.num_entries = j + 1; in dcn31_clk_mgr_helper_populate_bw_params()
589 bw_params->clk_table.entries[i].wck_ratio = 2; in dcn31_clk_mgr_helper_populate_bw_params()
592 bw_params->clk_table.entries[i].wck_ratio = 4; in dcn31_clk_mgr_helper_populate_bw_params()
603 bw_params->vram_type = bios_info->memory_type; in dcn31_clk_mgr_helper_populate_bw_params()
607 bw_params->wm_table.entries[i].wm_inst = i; in dcn31_clk_mgr_helper_populate_bw_params()
609 if (i >= bw_params->clk_table.num_entries) { in dcn31_clk_mgr_helper_populate_bw_params()
610 bw_params->wm_table.entries[i].valid = false; in dcn31_clk_mgr_helper_populate_bw_params()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/ |
| A D | rn_clk_mgr.c | 475 if (!bw_params->wm_table.entries[i].valid) in build_watermark_ranges()
897 bw_params->clk_table.num_entries = j + 1; in rn_clk_mgr_helper_populate_bw_params()
908 bw_params->vram_type = bios_info->memory_type; in rn_clk_mgr_helper_populate_bw_params()
912 bw_params->wm_table.entries[i].wm_inst = i; in rn_clk_mgr_helper_populate_bw_params()
914 if (i >= bw_params->clk_table.num_entries) { in rn_clk_mgr_helper_populate_bw_params()
915 bw_params->wm_table.entries[i].valid = false; in rn_clk_mgr_helper_populate_bw_params()
920 bw_params->wm_table.entries[i].valid = true; in rn_clk_mgr_helper_populate_bw_params()
923 if (bw_params->vram_type == LpDdr4MemType) { in rn_clk_mgr_helper_populate_bw_params()
930 bw_params->wm_table.entries[WM_D].valid = true; in rn_clk_mgr_helper_populate_bw_params()
1012 clk_mgr->base.bw_params = &rn_bw_params; in rn_clk_mgr_construct()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/ |
| A D | vg_clk_mgr.c | 406 if (!bw_params->wm_table.entries[i].valid) in vg_build_watermark_ranges()
424 bw_params->clk_table.entries[i].dcfclk_mhz; in vg_build_watermark_ranges()
637 struct clk_bw_params *bw_params = clk_mgr->base.bw_params; in vg_clk_mgr_helper_populate_bw_params() local
658 bw_params->clk_table.num_entries = j + 1; in vg_clk_mgr_helper_populate_bw_params()
667 bw_params->vram_type = bios_info->memory_type; in vg_clk_mgr_helper_populate_bw_params()
671 bw_params->wm_table.entries[i].wm_inst = i; in vg_clk_mgr_helper_populate_bw_params()
673 if (i >= bw_params->clk_table.num_entries) { in vg_clk_mgr_helper_populate_bw_params()
674 bw_params->wm_table.entries[i].valid = false; in vg_clk_mgr_helper_populate_bw_params()
679 bw_params->wm_table.entries[i].valid = true; in vg_clk_mgr_helper_populate_bw_params()
682 if (bw_params->vram_type == LpDdr4MemType) { in vg_clk_mgr_helper_populate_bw_params()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn301/ |
| A D | dcn301_fpu.c | 248 void dcn301_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params) in dcn301_update_bw_bounding_box() argument
251 struct clk_limit_table *clk_table = &bw_params->clk_table; in dcn301_update_bw_bounding_box()
262 dcn3_01_soc.num_chans = bw_params->num_channels; in dcn301_update_bw_bounding_box()
339 struct clk_bw_params *bw_params = dc->clk_mgr->bw_params; in dcn301_calculate_wm_and_dlg() local
341 ASSERT(bw_params); in dcn301_calculate_wm_and_dlg()
344 vlevel_max = bw_params->clk_table.num_entries - 1; in dcn301_calculate_wm_and_dlg()
347 table_entry = &bw_params->wm_table.entries[WM_D]; in dcn301_calculate_wm_and_dlg()
355 table_entry = &bw_params->wm_table.entries[WM_C]; in dcn301_calculate_wm_and_dlg()
360 table_entry = &bw_params->wm_table.entries[WM_B]; in dcn301_calculate_wm_and_dlg()
366 table_entry = &bw_params->wm_table.entries[WM_A]; in dcn301_calculate_wm_and_dlg()
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| A D | dcn301_fpu.h | 29 void dcn301_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params);
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| /linux/drivers/gpu/drm/amd/display/dc/dcn302/ |
| A D | dcn302_resource.c | 1306 if (bw_params->clk_table.entries[0].memclk_mhz) { in dcn302_update_bw_bounding_box()
1310 if (bw_params->clk_table.entries[i].dcfclk_mhz > max_dcfclk_mhz) in dcn302_update_bw_bounding_box()
1311 max_dcfclk_mhz = bw_params->clk_table.entries[i].dcfclk_mhz; in dcn302_update_bw_bounding_box()
1313 max_dispclk_mhz = bw_params->clk_table.entries[i].dispclk_mhz; in dcn302_update_bw_bounding_box()
1314 if (bw_params->clk_table.entries[i].dppclk_mhz > max_dppclk_mhz) in dcn302_update_bw_bounding_box()
1315 max_dppclk_mhz = bw_params->clk_table.entries[i].dppclk_mhz; in dcn302_update_bw_bounding_box()
1317 max_phyclk_mhz = bw_params->clk_table.entries[i].phyclk_mhz; in dcn302_update_bw_bounding_box()
1344 num_uclk_states = bw_params->clk_table.num_entries; in dcn302_update_bw_bounding_box()
1360 bw_params->clk_table.entries[j].memclk_mhz * 16; in dcn302_update_bw_bounding_box()
1406 if (!bw_params->clk_table.entries[i].dtbclk_mhz && i > 0) in dcn302_update_bw_bounding_box()
[all …]
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| A D | dcn302_resource.h | 33 void dcn302_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params);
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| /linux/drivers/gpu/drm/amd/display/dc/dcn303/ |
| A D | dcn303_resource.c | 1236 if (bw_params->clk_table.entries[0].memclk_mhz) { in dcn303_update_bw_bounding_box()
1240 if (bw_params->clk_table.entries[i].dcfclk_mhz > max_dcfclk_mhz) in dcn303_update_bw_bounding_box()
1241 max_dcfclk_mhz = bw_params->clk_table.entries[i].dcfclk_mhz; in dcn303_update_bw_bounding_box()
1243 max_dispclk_mhz = bw_params->clk_table.entries[i].dispclk_mhz; in dcn303_update_bw_bounding_box()
1245 max_dppclk_mhz = bw_params->clk_table.entries[i].dppclk_mhz; in dcn303_update_bw_bounding_box()
1247 max_phyclk_mhz = bw_params->clk_table.entries[i].phyclk_mhz; in dcn303_update_bw_bounding_box()
1272 num_uclk_states = bw_params->clk_table.num_entries; in dcn303_update_bw_bounding_box()
1287 bw_params->clk_table.entries[j].memclk_mhz * 16; in dcn303_update_bw_bounding_box()
1304 bw_params->clk_table.entries[j++].memclk_mhz * 16; in dcn303_update_bw_bounding_box()
1334 if (!bw_params->clk_table.entries[i].dtbclk_mhz && i > 0) in dcn303_update_bw_bounding_box()
[all …]
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| A D | dcn303_resource.h | 15 void dcn303_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params);
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| /linux/drivers/gpu/drm/amd/display/dc/dcn30/ |
| A D | dcn30_resource.c | 2147 if (dc->clk_mgr->bw_params->wm_table.nv_entries[WM_B].valid) { in dcn30_calculate_wm_and_dlg_fp()
2194 if (dc->clk_mgr->bw_params->wm_table.nv_entries[WM_C].valid) { in dcn30_calculate_wm_and_dlg_fp()
2199 …min_dram_speed_mts = dc->clk_mgr->bw_params->clk_table.entries[dc->clk_mgr->bw_params->clk_table.n… in dcn30_calculate_wm_and_dlg_fp()
2278 if (dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].valid) { in dcn30_update_soc_for_wm_a()
2406 if (bw_params->clk_table.entries[0].memclk_mhz) { in dcn30_update_bw_bounding_box()
2411 max_dcfclk_mhz = bw_params->clk_table.entries[i].dcfclk_mhz; in dcn30_update_bw_bounding_box()
2413 max_dispclk_mhz = bw_params->clk_table.entries[i].dispclk_mhz; in dcn30_update_bw_bounding_box()
2415 max_dppclk_mhz = bw_params->clk_table.entries[i].dppclk_mhz; in dcn30_update_bw_bounding_box()
2417 max_phyclk_mhz = bw_params->clk_table.entries[i].phyclk_mhz; in dcn30_update_bw_bounding_box()
2445 num_uclk_states = bw_params->clk_table.num_entries; in dcn30_update_bw_bounding_box()
[all …]
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| A D | dcn30_resource.h | 97 void dcn30_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params);
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| /linux/drivers/media/tuners/ |
| A D | tda18212.c | 36 static const u8 bw_params[][3] = { in tda18212_set_params() local
115 ret = regmap_write(dev->regmap, 0x23, bw_params[i][2]); in tda18212_set_params()
123 ret = regmap_write(dev->regmap, 0x0f, bw_params[i][0]); in tda18212_set_params()
128 buf[1] = bw_params[i][1]; in tda18212_set_params()
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| /linux/drivers/gpu/drm/amd/display/dc/dcn31/ |
| A D | dcn31_resource.c | 1847 if (dc->clk_mgr->bw_params->wm_table.entries[WM_A].valid) { in dcn31_update_soc_for_wm_a()
1850 …context->bw_ctx.dml.soc.sr_exit_time_us = dc->clk_mgr->bw_params->wm_table.entries[WM_A].sr_exit_t… in dcn31_update_soc_for_wm_a()
1883 if (dc->clk_mgr->bw_params->wm_table.nv_entries[WM_B].valid) { in dcn31_calculate_wm_and_dlg_fp()
1890 …context->bw_ctx.dml.soc.sr_exit_time_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_B].dml_in… in dcn31_calculate_wm_and_dlg_fp()
1909 if (dc->clk_mgr->bw_params->wm_table.nv_entries[WM_C].valid) { in dcn31_calculate_wm_and_dlg_fp()
1912 …context->bw_ctx.dml.soc.sr_exit_time_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_C].dml_in… in dcn31_calculate_wm_and_dlg_fp()
1928 if (dc->clk_mgr->bw_params->wm_table.nv_entries[WM_D].valid) { in dcn31_calculate_wm_and_dlg_fp()
1931 …context->bw_ctx.dml.soc.sr_exit_time_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_D].dml_in… in dcn31_calculate_wm_and_dlg_fp()
2056 static void dcn31_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params) in dcn31_update_bw_bounding_box() argument
2058 struct clk_limit_table *clk_table = &bw_params->clk_table; in dcn31_update_bw_bounding_box()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dcn21/ |
| A D | dcn21_resource.c | 1072 dc->clk_mgr->bw_params->wm_table.entries[i].sr_exit_time_us = in patch_bounding_box()
1090 dc->clk_mgr->bw_params->wm_table.entries[i].pstate_latency_us = in patch_bounding_box()
1107 struct clk_bw_params *bw_params = dc->clk_mgr->bw_params; in dcn21_calculate_wm() local
1109 ASSERT(bw_params); in dcn21_calculate_wm()
1152 vlevel_max = bw_params->clk_table.num_entries - 1; in dcn21_calculate_wm()
1156 table_entry = &bw_params->wm_table.entries[WM_D]; in dcn21_calculate_wm()
1164 table_entry = &bw_params->wm_table.entries[WM_C]; in dcn21_calculate_wm()
1169 table_entry = &bw_params->wm_table.entries[WM_B]; in dcn21_calculate_wm()
1175 table_entry = &bw_params->wm_table.entries[WM_A]; in dcn21_calculate_wm()
1593 struct clk_limit_table *clk_table = &bw_params->clk_table; in update_bw_bounding_box()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| A D | clk_mgr.h | 280 struct clk_bw_params *bw_params; member
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| /linux/drivers/media/dvb-frontends/ |
| A D | rtl2832.c | 411 static u8 bw_params[3][32] = { in rtl2832_set_frontend() local
477 for (j = 0; j < sizeof(bw_params[0]); j++) { in rtl2832_set_frontend()
479 0x11c + j, &bw_params[i][j], 1); in rtl2832_set_frontend()
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| /linux/drivers/gpu/drm/amd/display/dc/inc/ |
| A D | core_types.h | 182 struct clk_bw_params *bw_params);
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| /linux/drivers/net/ethernet/broadcom/bnx2x/ |
| A D | bnx2x_link.h | 506 struct bnx2x_ets_bw_params bw_params; member
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| A D | bnx2x_dcb.c | 592 ets_params.cos[i].params.bw_params.bw = in bnx2x_dcbx_update_ets_config()
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| A D | bnx2x_link.c | 906 if (!ets_params->cos[cos_idx].params.bw_params.bw) { in bnx2x_ets_e3b0_get_total_bw()
912 ets_params->cos[cos_idx].params.bw_params.bw in bnx2x_ets_e3b0_get_total_bw()
916 ets_params->cos[cos_idx].params.bw_params.bw; in bnx2x_ets_e3b0_get_total_bw()
1185 ets_params->cos[cos_entry].params.bw_params.bw, in bnx2x_ets_e3b0_config()
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| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| A D | dc.c | 1005 dc->res_pool->funcs->update_bw_bounding_box(dc, dc->clk_mgr->bw_params); in dc_construct()
|