/linux/drivers/gpu/drm/amd/amdgpu/ |
A D | amdgpu_acp.c | 360 val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET); in acp_hw_init() 367 val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET); in acp_hw_init() 379 val = cgs_read_register(adev->acp.cgs_device, mmACP_CONTROL); in acp_hw_init() 386 val = cgs_read_register(adev->acp.cgs_device, mmACP_STATUS); in acp_hw_init() 397 val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET); in acp_hw_init() 429 val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET); in acp_hw_fini() 436 val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET); in acp_hw_fini() 447 val = cgs_read_register(adev->acp.cgs_device, mmACP_CONTROL); in acp_hw_fini() 454 val = cgs_read_register(adev->acp.cgs_device, mmACP_STATUS); in acp_hw_fini()
|
/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
A D | iceland_smumgr.c | 1308 ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC7) >> 16) & 0xf)) in iceland_populate_single_memory_level() 1309 dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC5) >> 1) & 0x1) ? 1 : 0; in iceland_populate_single_memory_level() 1311 dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC6) >> 1) & 0x1) ? 1 : 0; in iceland_populate_single_memory_level() 1317 dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC5) >> 1) & 0x1) ? 1 : 0; in iceland_populate_single_memory_level() 1600 dramTiming = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING); in iceland_populate_memory_timing_parameters() 1601 dramTiming2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2); in iceland_populate_memory_timing_parameters() 2371 return (uint8_t) (0xFF & (cgs_read_register(hwmgr->device, mmBIOS_SCRATCH_4) >> 16)); in iceland_get_memory_modile_index() 2523 temp_reg = cgs_read_register(hwmgr->device, mmMC_PMG_CMD_EMRS); in iceland_set_mc_special_registers() 2535 temp_reg = cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS); in iceland_set_mc_special_registers() 2564 temp_reg = cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS1); in iceland_set_mc_special_registers() [all …]
|
A D | ci_smumgr.c | 152 original_data = cgs_read_register(hwmgr->device, mmSMC_IND_DATA_0); in ci_copy_bytes_to_smc() 205 *value = cgs_read_register(hwmgr->device, mmSMC_IND_DATA_0); in ci_read_smc_sram_dword() 1261 ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC7) >> 16) & 0xf)) in ci_populate_single_memory_level() 1262 dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC5) >> 1) & 0x1) ? 1 : 0; in ci_populate_single_memory_level() 1270 dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC5) >> 1) & 0x1) ? 1 : 0; in ci_populate_single_memory_level() 1638 dramTiming = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING); in ci_populate_memory_timing_parameters() 1639 dramTiming2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2); in ci_populate_memory_timing_parameters() 2443 return (uint8_t) (0xFF & (cgs_read_register(hwmgr->device, mmBIOS_SCRATCH_4) >> 16)); in ci_get_memory_modile_index() 2595 temp_reg = cgs_read_register(hwmgr->device, mmMC_PMG_CMD_EMRS); in ci_set_mc_special_registers() 2607 temp_reg = cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS); in ci_set_mc_special_registers() [all …]
|
A D | tonga_smumgr.c | 2401 (0 == (cgs_read_register(hwmgr->device, mmGPIOPAD_A) & in tonga_init_smc_table() 2988 temp_reg = cgs_read_register(hwmgr->device, in tonga_set_mc_special_registers() 3086 cgs_read_register(hwmgr->device, mmMC_SEQ_DLL_STBY)); in tonga_initialize_mc_reg_table() 3102 cgs_read_register(hwmgr->device, mmMC_PMG_CMD_EMRS)); in tonga_initialize_mc_reg_table() 3104 cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS)); in tonga_initialize_mc_reg_table() 3106 cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS1)); in tonga_initialize_mc_reg_table() 3108 cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_D0)); in tonga_initialize_mc_reg_table() 3110 cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_D1)); in tonga_initialize_mc_reg_table() 3112 cgs_read_register(hwmgr->device, mmMC_SEQ_RD_CTL_D0)); in tonga_initialize_mc_reg_table() 3118 cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS2)); in tonga_initialize_mc_reg_table() [all …]
|
A D | smu8_smumgr.c | 61 return cgs_read_register(hwmgr->device, in smu8_get_argument() 80 uint32_t val = cgs_read_register(hwmgr->device, in smu8_send_msg_to_smc_with_parameter() 161 (cgs_read_register(hwmgr->device, mmMP0PUB_IND_DATA) & firmware)) in smu8_check_fw_load_finish() 191 tmp = cgs_read_register(hwmgr->device, in smu8_load_mec_firmware() 197 tmp = cgs_read_register(hwmgr->device, in smu8_load_mec_firmware() 746 hwmgr->smu_version = cgs_read_register(hwmgr->device, mmMP0PUB_IND_DATA); in smu8_start_smu()
|
A D | smu7_smumgr.c | 125 original_data = cgs_read_register(hwmgr->device, mmSMC_IND_DATA_11); in smu7_copy_bytes_to_smc() 205 return cgs_read_register(hwmgr->device, mmSMC_MSG_ARG_0); in smu7_get_argument() 268 *value = result ? 0 : cgs_read_register(hwmgr->device, mmSMC_IND_DATA_11); in smu7_read_smc_sram_dword()
|
A D | fiji_smumgr.c | 1508 dram_timing = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING); in fiji_populate_memory_timing_parameters() 1509 dram_timing2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2); in fiji_populate_memory_timing_parameters() 1510 burstTime = cgs_read_register(hwmgr->device, mmMC_ARB_BURST_TIME); in fiji_populate_memory_timing_parameters() 2072 table->ThermOutPolarity = (0 == (cgs_read_register(hwmgr->device, mmGPIOPAD_A) & in fiji_init_smc_table() 2524 cgs_read_register(hwmgr->device, mmMC_SEQ_RAS_TIMING)); in fiji_initialize_mc_reg_table() 2526 cgs_read_register(hwmgr->device, mmMC_SEQ_CAS_TIMING)); in fiji_initialize_mc_reg_table() 2528 cgs_read_register(hwmgr->device, mmMC_SEQ_MISC_TIMING2)); in fiji_initialize_mc_reg_table() 2530 cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_D1)); in fiji_initialize_mc_reg_table() 2532 cgs_read_register(hwmgr->device, mmMC_SEQ_RD_CTL_D0)); in fiji_initialize_mc_reg_table() 2534 cgs_read_register(hwmgr->device, mmMC_SEQ_RD_CTL_D1)); in fiji_initialize_mc_reg_table() [all …]
|
A D | vegam_smumgr.c | 1263 dram_timing = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING); in vegam_populate_memory_timing_parameters() 1264 dram_timing2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2); in vegam_populate_memory_timing_parameters() 1265 burst_time = cgs_read_register(hwmgr->device, mmMC_ARB_BURST_TIME); in vegam_populate_memory_timing_parameters() 1266 rfsh_rate = cgs_read_register(hwmgr->device, mmMC_ARB_RFSH_RATE); in vegam_populate_memory_timing_parameters() 1267 misc3 = cgs_read_register(hwmgr->device, mmMC_ARB_MISC3); in vegam_populate_memory_timing_parameters() 2087 (0 == (cgs_read_register(hwmgr->device, mmGPIOPAD_A) & in vegam_init_smc_table()
|
A D | polaris10_smumgr.c | 1478 dram_timing = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING); in polaris10_populate_memory_timing_parameters() 1479 dram_timing2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2); in polaris10_populate_memory_timing_parameters() 2078 table->ThermOutPolarity = (0 == (cgs_read_register(hwmgr->device, mmGPIOPAD_A) in polaris10_init_smc_table() 2565 return (uint8_t) (0xFF & (cgs_read_register(hwmgr->device, mmBIOS_SCRATCH_4) >> 16)); in polaris10_get_memory_modile_index()
|
/linux/drivers/gpu/drm/amd/include/ |
A D | cgs_common.h | 131 …cgs_write_register(device, mm##reg, (cgs_read_register(device, mm##reg) & ~CGS_REG_FIELD_MASK(reg,… 165 #define cgs_read_register(dev,offset) \ macro
|
/linux/drivers/gpu/drm/amd/acp/ |
A D | acp_hw.c | 43 acp_mode = cgs_read_register(cgs_device, in amd_acp_hw_init()
|
/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
A D | smu_helper.h | 152 PHM_GET_FIELD(cgs_read_register(device, mm##reg), reg, field) 164 cgs_read_register(device, mm##reg), reg, field, fieldval))
|
A D | smu7_hwmgr.c | 552 mc_cg_config = cgs_read_register(hwmgr->device, mmMC_CG_CONFIG); in smu7_copy_and_switch_arb_sets() 1287 (cgs_read_register(hwmgr->device, 0x1488) & ~0x1)); in smu7_start_dpm() 4750 cgs_read_register(hwmgr->device, mmDLL_CNTL); in smu7_read_clock_registers() 4752 cgs_read_register(hwmgr->device, mmMCLK_PWRMGT_CNTL); in smu7_read_clock_registers() 4754 cgs_read_register(hwmgr->device, mmMPLL_AD_FUNC_CNTL); in smu7_read_clock_registers() 4756 cgs_read_register(hwmgr->device, mmMPLL_DQ_FUNC_CNTL); in smu7_read_clock_registers() 4758 cgs_read_register(hwmgr->device, mmMPLL_FUNC_CNTL); in smu7_read_clock_registers() 4760 cgs_read_register(hwmgr->device, mmMPLL_FUNC_CNTL_1); in smu7_read_clock_registers() 4762 cgs_read_register(hwmgr->device, mmMPLL_FUNC_CNTL_2); in smu7_read_clock_registers() 4764 cgs_read_register(hwmgr->device, mmMPLL_SS1); in smu7_read_clock_registers() [all …]
|
A D | smu_helper.c | 122 cur_value = cgs_read_register(hwmgr->device, index); in phm_wait_on_register() 166 cur_value = cgs_read_register(hwmgr->device, in phm_wait_for_register_unequal()
|
A D | smu7_powertune.c | 927 data = cgs_read_register(hwmgr->device, config_regs->offset); in smu7_program_pt_config_registers() 979 value2 = cgs_read_register(hwmgr->device, mmGRBM_GFX_INDEX); in smu7_enable_didt_config()
|
A D | vega10_powertune.c | 817 data = cgs_read_register(hwmgr->device, config_regs->offset); in vega10_program_gc_didt_config_registers()
|
/linux/drivers/gpu/drm/amd/display/amdgpu_dm/ |
A D | amdgpu_dm.c | 11483 value = cgs_read_register(ctx->cgs_device, address); in dm_read_reg_func()
|