| /linux/drivers/gpu/drm/amd/include/ |
| A D | cgs_common.h | 134 …cgs_write_ind_register(device, space, ix##reg, (cgs_read_ind_register(device, space, ix##reg) & ~C…
171 #define cgs_write_ind_register(dev,space,index,value) \ macro
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| /linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| A D | vega10_powertune.c | 788 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__DIDT, config_regs->offset, data); in vega10_program_didt_config_registers()
794 cgs_write_ind_register(hwmgr->device, CGS_IND_REG_GC_CAC, config_regs->offset, data); in vega10_program_didt_config_registers()
800 cgs_write_ind_register(hwmgr->device, CGS_IND_REG_SE_CAC, config_regs->offset, data); in vega10_program_didt_config_registers()
871 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__DIDT, ixDIDT_SQ_EDC_CTRL, data); in vega10_didt_set_mask()
878 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__DIDT, ixDIDT_DB_EDC_CTRL, data); in vega10_didt_set_mask()
885 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__DIDT, ixDIDT_TD_EDC_CTRL, data); in vega10_didt_set_mask()
892 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__DIDT, ixDIDT_TCP_EDC_CTRL, data); in vega10_didt_set_mask()
899 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__DIDT, ixDIDT_DBR_EDC_CTRL, data); in vega10_didt_set_mask()
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| A D | smu7_hwmgr.c | 464 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, in smu7_enable_display_gap()
488 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, in smu7_program_voting_clients()
505 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, in smu7_clear_voting_clients()
1176 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, in smu7_disable_sclk_vce_handshake()
1193 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, in smu7_disable_handshake_uvd()
1278 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, in smu7_start_dpm()
1468 cgs_write_ind_register(hwmgr->device, in smu7_program_edc_didt_registers()
3940 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, in smu7_get_gpu_power()
4552 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, in smu7_program_display_gap()
4557 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, in smu7_program_display_gap()
[all …]
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| A D | smu_helper.h | 167 cgs_write_ind_register(device, port, ix##reg, \
172 cgs_write_ind_register(device, port, ix##reg, \
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| A D | smu7_powertune.c | 937 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, config_regs->offset, data); in smu7_program_pt_config_registers()
941 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__DIDT, config_regs->offset, data); in smu7_program_pt_config_registers()
945 cgs_write_ind_register(hwmgr->device, CGS_IND_REG_GC_CAC, config_regs->offset, data); in smu7_program_pt_config_registers()
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| A D | smu8_hwmgr.c | 948 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, in smu8_program_voting_clients()
955 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, in smu8_clear_voting_clients()
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| /linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
| A D | fiji_smumgr.c | 115 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, in fiji_start_smu_in_protection_mode()
134 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, in fiji_start_smu_in_protection_mode()
169 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, in fiji_start_smu_in_non_protection_mode()
1769 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, in fiji_populate_clock_stretcher_data_table()
1812 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixPWR_CKS_CNTL, value); in fiji_populate_clock_stretcher_data_table()
1951 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, in fiji_init_smc_table()
2384 cgs_write_ind_register(hwmgr->device, in fiji_update_uvd_smc_table()
2420 cgs_write_ind_register(hwmgr->device, in fiji_update_vce_smc_table()
2585 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp)); in fiji_update_dpm_settings()
2600 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp)); in fiji_update_dpm_settings()
[all …]
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| A D | polaris10_smumgr.c | 216 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixSMU_STATUS, 0); in polaris10_start_smu_in_protection_mode()
241 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixFIRMWARE_FLAGS, 0); in polaris10_start_smu_in_protection_mode()
264 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, in polaris10_start_smu_in_non_protection_mode()
1706 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixPWR_CKS_CNTL, value); in polaris10_populate_clock_stretcher_data_table()
1948 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, in polaris10_init_smc_table()
2300 cgs_write_ind_register(hwmgr->device, in polaris10_update_uvd_smc_table()
2336 cgs_write_ind_register(hwmgr->device, in polaris10_update_vce_smc_table()
2625 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp)); in polaris10_update_dpm_settings()
2640 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp)); in polaris10_update_dpm_settings()
2660 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp)); in polaris10_update_dpm_settings()
[all …]
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| A D | vegam_smumgr.c | 116 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixSMU_STATUS, 0); in vegam_start_smu_in_protection_mode()
141 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixFIRMWARE_FLAGS, 0); in vegam_start_smu_in_protection_mode()
164 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, in vegam_start_smu_in_non_protection_mode()
350 cgs_write_ind_register(hwmgr->device, in vegam_update_uvd_smc_table()
386 cgs_write_ind_register(hwmgr->device, in vegam_update_vce_smc_table()
1543 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixPWR_CKS_CNTL, value); in vegam_populate_clock_stretcher_data_table()
1704 cgs_write_ind_register(hwmgr->device, in vegam_populate_vr_config()
1718 cgs_write_ind_register(hwmgr->device, in vegam_populate_vr_config()
1957 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, in vegam_init_smc_table()
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| A D | tonga_smumgr.c | 110 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, in tonga_start_in_protection_mode()
126 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, in tonga_start_in_protection_mode()
164 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, in tonga_start_in_non_protection_mode()
1698 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, in tonga_populate_clock_stretcher_data_table()
1740 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, in tonga_populate_clock_stretcher_data_table()
2264 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, in tonga_init_smc_table()
2695 cgs_write_ind_register(hwmgr->device, in tonga_update_uvd_smc_table()
2730 cgs_write_ind_register(hwmgr->device, in tonga_update_vce_smc_table()
3184 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp)); in tonga_update_dpm_settings()
3199 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp)); in tonga_update_dpm_settings()
[all …]
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| A D | ci_smumgr.c | 1973 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, in ci_init_smc_table()
2795 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp)); in ci_update_dpm_settings()
2810 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp)); in ci_update_dpm_settings()
2830 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp)); in ci_update_dpm_settings()
2845 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp)); in ci_update_dpm_settings()
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| A D | smu7_smumgr.c | 331 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, in smu7_request_smu_load_fw()
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| A D | iceland_smumgr.c | 213 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, in iceland_smu_upload_firmware_image()
1962 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, in iceland_init_smc_table()
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| /linux/drivers/gpu/drm/amd/display/dc/ |
| A D | dm_services.h | 84 cgs_write_ind_register(ctx->cgs_device, addr_space, index, value); in dm_write_index_reg()
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