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Searched refs:clk (Results 1 – 25 of 2249) sorted by relevance

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/linux/include/linux/
A Dclk.h55 struct clk *clk; member
72 struct clk *clk; member
89 struct clk *clk; member
150 int clk_get_phase(struct clk *clk);
201 struct clk *clk, in devm_clk_notifier_register() argument
250 int clk_prepare(struct clk *clk);
596 void clk_put(struct clk *clk);
704 bool clk_has_parent(struct clk *clk, struct clk *parent);
741 int clk_set_parent(struct clk *clk, struct clk *parent);
750 struct clk *clk_get_parent(struct clk *clk);
[all …]
/linux/drivers/clk/ux500/
A Du8500_of_clk.c32 struct clk **clk_data = data; in ux500_twocell_get()
54 struct clk *clk, *rtc_clk, *twd_clk; in u8500_clk_init() local
259 PRCC_PCLK_STORE(clk, 1, 0); in u8500_clk_init()
263 PRCC_PCLK_STORE(clk, 1, 1); in u8500_clk_init()
267 PRCC_PCLK_STORE(clk, 1, 2); in u8500_clk_init()
271 PRCC_PCLK_STORE(clk, 1, 3); in u8500_clk_init()
275 PRCC_PCLK_STORE(clk, 1, 4); in u8500_clk_init()
279 PRCC_PCLK_STORE(clk, 1, 5); in u8500_clk_init()
283 PRCC_PCLK_STORE(clk, 1, 6); in u8500_clk_init()
287 PRCC_PCLK_STORE(clk, 1, 7); in u8500_clk_init()
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/linux/arch/arm/mach-omap1/
A Dclock.h45 #define __clk_get_name(clk) (clk->name) argument
46 #define __clk_get_parent(clk) (clk->parent) argument
47 #define __clk_get_rate(clk) (clk->rate) argument
163 int (*clk_enable)(struct clk *clk); argument
164 void (*clk_disable)(struct clk *clk);
167 int (*clk_set_parent)(struct clk *clk, struct clk *parent);
169 void (*clk_deny_idle)(struct clk *clk);
174 extern void clk_preinit(struct clk *clk);
175 extern int clk_register(struct clk *clk);
220 struct clk clk; member
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A Dclock.c423 ret = clk->ops->enable(clk); in omap1_clk_enable()
440 clk->ops->disable(clk); in omap1_clk_disable()
571 ret = clk->set_rate(clk, rate); in omap1_clk_set_rate()
603 clk->ops->disable(clk); in omap1_clk_disable_unused()
610 int clk_enable(struct clk *clk) in clk_enable() argument
626 void clk_disable(struct clk *clk) in clk_disable() argument
702 int clk_set_parent(struct clk *clk, struct clk *parent) in clk_set_parent() argument
710 struct clk *clk_get_parent(struct clk *clk) in clk_get_parent() argument
787 void clk_preinit(struct clk *clk) in clk_preinit() argument
792 int clk_register(struct clk *clk) in clk_register() argument
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/linux/drivers/clk/imx/
A Dclk-imx5.c128 static struct clk *clk[IMX5_CLK_END]; variable
277 clk_set_parent(clk[IMX5_CLK_USB_PHY_SEL], clk[IMX5_CLK_OSC]); in mx5_clocks_common_init()
340 imx_check_clocks(clk, ARRAY_SIZE(clk)); in mx50_clocks_init()
347 clk_set_parent(clk[IMX5_CLK_ESDHC_A_SEL], clk[IMX5_CLK_PLL2_SW]); in mx50_clocks_init()
348 clk_set_parent(clk[IMX5_CLK_ESDHC_B_SEL], clk[IMX5_CLK_PLL2_SW]); in mx50_clocks_init()
431 imx_check_clocks(clk, ARRAY_SIZE(clk)); in mx51_clocks_init()
438 clk_set_parent(clk[IMX5_CLK_USBOH3_SEL], clk[IMX5_CLK_PLL2_SW]); in mx51_clocks_init()
441 clk_set_parent(clk[IMX5_CLK_ESDHC_A_SEL], clk[IMX5_CLK_PLL2_SW]); in mx51_clocks_init()
585 imx_check_clocks(clk, ARRAY_SIZE(clk)); in mx53_clocks_init()
600 clk_set_parent(clk[IMX5_CLK_CAN_SEL], clk[IMX5_CLK_LP_APM]); in mx53_clocks_init()
[all …]
A Dclk-vf610.c113 static struct clk *clk[VF610_CLK_END]; variable
134 struct clk *clk = of_clk_get_by_name(ccm_node, name); in vf610_get_fixed_clock() local
139 return clk; in vf610_get_fixed_clock()
236 clk_set_parent(clk[VF610_PLL1_BYPASS], clk[VF610_CLK_PLL1]); in vf610_clocks_init()
237 clk_set_parent(clk[VF610_PLL2_BYPASS], clk[VF610_CLK_PLL2]); in vf610_clocks_init()
238 clk_set_parent(clk[VF610_PLL3_BYPASS], clk[VF610_CLK_PLL3]); in vf610_clocks_init()
239 clk_set_parent(clk[VF610_PLL4_BYPASS], clk[VF610_CLK_PLL4]); in vf610_clocks_init()
240 clk_set_parent(clk[VF610_PLL5_BYPASS], clk[VF610_CLK_PLL5]); in vf610_clocks_init()
241 clk_set_parent(clk[VF610_PLL6_BYPASS], clk[VF610_CLK_PLL6]); in vf610_clocks_init()
242 clk_set_parent(clk[VF610_PLL7_BYPASS], clk[VF610_CLK_PLL7]); in vf610_clocks_init()
[all …]
A Dclk-imx27.c49 static struct clk *clk[IMX27_CLK_MAX]; variable
56 clk[IMX27_CLK_DUMMY] = imx_clk_fixed("dummy", 0); in _mx27_clocks_init()
57 clk[IMX27_CLK_CKIH] = imx_clk_fixed("ckih", fref); in _mx27_clocks_init()
58 clk[IMX27_CLK_CKIL] = imx_clk_fixed("ckil", 32768); in _mx27_clocks_init()
59 clk[IMX27_CLK_FPM] = imx_clk_fixed_factor("fpm", "ckil", 1024, 1); in _mx27_clocks_init()
71 clk[IMX27_CLK_IPG] = imx_clk_fixed_factor("ipg", "ahb", 1, 2); in _mx27_clocks_init()
162 imx_check_clocks(clk, ARRAY_SIZE(clk)); in _mx27_clocks_init()
164 clk_register_clkdev(clk[IMX27_CLK_CPU_DIV], NULL, "cpu0"); in _mx27_clocks_init()
166 clk_prepare_enable(clk[IMX27_CLK_EMI_AHB_GATE]); in _mx27_clocks_init()
192 clk_data.clks = clk; in mx27_clocks_init_dt()
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A DMakefile3 mxc-clk-objs += clk.o
4 mxc-clk-objs += clk-busy.o
7 mxc-clk-objs += clk-cpu.o
9 mxc-clk-objs += clk-fixup-div.o
12 mxc-clk-objs += clk-gate2.o
14 mxc-clk-objs += clk-pfd.o
15 mxc-clk-objs += clk-pfdv2.o
16 mxc-clk-objs += clk-pllv1.o
17 mxc-clk-objs += clk-pllv2.o
18 mxc-clk-objs += clk-pllv3.o
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A D.built-in.a.cmd1 …clk/imx/built-in.a := echo >/dev/null; rm -f drivers/clk/imx/built-in.a; /usr/bin/ccache /home/tes…
A Dclk-imx25.c74 static struct clk *clk[clk_max]; variable
80 clk[dummy] = imx_clk_fixed("dummy", 0); in __mx25_clocks_init()
86 clk[ahb] = imx_clk_divider("ahb", "cpu", ccm(CCM_CCTL), 28, 2); in __mx25_clocks_init()
88 clk[ipg] = imx_clk_fixed_factor("ipg", "ahb", 1, 2); in __mx25_clocks_init()
107 clk[cko] = imx_clk_gate("cko", "cko_div", ccm(CCM_MCR), 30); in __mx25_clocks_init()
208 imx_check_clocks(clk, ARRAY_SIZE(clk)); in __mx25_clocks_init()
210 clk_prepare_enable(clk[emi_ahb]); in __mx25_clocks_init()
213 clk_set_parent(clk[per5_sel], clk[ahb]); in __mx25_clocks_init()
219 clk_set_parent(clk[cko_sel], clk[ipg]); in __mx25_clocks_init()
233 clk_data.clks = clk; in mx25_clocks_init_dt()
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/linux/drivers/clk/mediatek/
A D.built-in.a.cmd1 …clk/mediatek/built-in.a := echo >/dev/null; rm -f drivers/clk/mediatek/built-in.a; /usr/bin/ccache…
A DMakefile2 obj-$(CONFIG_COMMON_CLK_MEDIATEK) += clk-mtk.o clk-pll.o clk-gate.o clk-apmixed.o clk-cpumux.o rese…
4 obj-$(CONFIG_COMMON_CLK_MT6765) += clk-mt6765.o
11 obj-$(CONFIG_COMMON_CLK_MT6779) += clk-mt6779.o
83 obj-$(CONFIG_COMMON_CLK_MT8195) += clk-mt8195-apmixedsys.o clk-mt8195-topckgen.o \
84 clk-mt8195-peri_ao.o clk-mt8195-infra_ao.o \
85 clk-mt8195-cam.o clk-mt8195-ccu.o clk-mt8195-img.o \
86 clk-mt8195-ipe.o clk-mt8195-mfg.o clk-mt8195-scp_adsp.o \
87 clk-mt8195-vdec.o clk-mt8195-vdo0.o clk-mt8195-vdo1.o \
88 clk-mt8195-venc.o clk-mt8195-vpp0.o clk-mt8195-vpp1.o \
89 clk-mt8195-wpe.o clk-mt8195-imp_iic_wrap.o \
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/linux/drivers/sh/clk/
A Dcpg.c19 static unsigned int sh_clk_read(struct clk *clk) in sh_clk_read() argument
39 static int sh_clk_mstp_enable(struct clk *clk) in sh_clk_mstp_enable() argument
41 sh_clk_write(sh_clk_read(clk) & ~(1 << clk->enable_bit), clk); in sh_clk_mstp_enable()
61 clk->enable_reg, clk->enable_bit); in sh_clk_mstp_enable()
70 sh_clk_write(sh_clk_read(clk) | (1 << clk->enable_bit), clk); in sh_clk_mstp_disable()
123 idx = (sh_clk_read(clk) >> clk->enable_bit) & clk->div_mask; in sh_clk_div_recalc()
201 if (!clk->parent_table || !clk->parent_num) in sh_clk_init_parent()
217 clk_reparent(clk, clk->parent_table[val]); in sh_clk_init_parent()
279 static int sh_clk_div6_set_parent(struct clk *clk, struct clk *parent) in sh_clk_div6_set_parent() argument
336 static int sh_clk_div4_set_parent(struct clk *clk, struct clk *parent) in sh_clk_div4_set_parent() argument
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A Dcore.c246 clk->ops->disable(clk); in __clk_disable()
330 static struct clk *lookup_root_clock(struct clk *clk) in lookup_root_clock() argument
333 clk = clk->parent; in lookup_root_clock()
442 clk->ops->init(clk); in clk_register()
500 clk->rate = clk->ops->recalc(clk); in clk_set_rate()
530 clk->rate = clk->ops->recalc(clk); in clk_set_parent()
532 clk, clk->parent, clk->rate); in clk_set_parent()
543 struct clk *clk_get_parent(struct clk *clk) in clk_get_parent() argument
607 struct clk *clk; in clk_late_init() local
614 if (!clk->usecount && clk->ops && clk->ops->disable) in clk_late_init()
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/linux/drivers/clk/mmp/
A Dclk-mmp2.c79 struct clk *clk; in mmp2_clk_init() local
80 struct clk *vctcxo; in mmp2_clk_init()
104 clk_register_clkdev(clk, "clk32", NULL); in mmp2_clk_init()
110 clk_register_clkdev(clk, "pll1", NULL); in mmp2_clk_init()
116 clk_register_clkdev(clk, "pll2", NULL); in mmp2_clk_init()
120 clk_register_clkdev(clk, "pll1_2", NULL); in mmp2_clk_init()
190 clk_set_rate(clk, 14745600); in mmp2_clk_init()
249 clk_set_parent(clk, vctcxo); in mmp2_clk_init()
260 clk_set_parent(clk, vctcxo); in mmp2_clk_init()
271 clk_set_parent(clk, vctcxo); in mmp2_clk_init()
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A Dclk-pxa168.c72 struct clk *clk; in pxa168_clk_init() local
73 struct clk *uart_pll; in pxa168_clk_init()
97 clk_register_clkdev(clk, "clk32", NULL); in pxa168_clk_init()
100 clk_register_clkdev(clk, "vctcxo", NULL); in pxa168_clk_init()
103 clk_register_clkdev(clk, "pll1", NULL); in pxa168_clk_init()
107 clk_register_clkdev(clk, "pll1_2", NULL); in pxa168_clk_init()
111 clk_register_clkdev(clk, "pll1_4", NULL); in pxa168_clk_init()
115 clk_register_clkdev(clk, "pll1_8", NULL); in pxa168_clk_init()
204 clk_set_parent(clk, uart_pll); in pxa168_clk_init()
215 clk_set_parent(clk, uart_pll); in pxa168_clk_init()
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A Dclk-pxa910.c70 struct clk *clk; in pxa910_clk_init() local
71 struct clk *uart_pll; in pxa910_clk_init()
102 clk_register_clkdev(clk, "clk32", NULL); in pxa910_clk_init()
105 clk_register_clkdev(clk, "vctcxo", NULL); in pxa910_clk_init()
108 clk_register_clkdev(clk, "pll1", NULL); in pxa910_clk_init()
112 clk_register_clkdev(clk, "pll1_2", NULL); in pxa910_clk_init()
116 clk_register_clkdev(clk, "pll1_4", NULL); in pxa910_clk_init()
120 clk_register_clkdev(clk, "pll1_8", NULL); in pxa910_clk_init()
209 clk_set_parent(clk, uart_pll); in pxa910_clk_init()
220 clk_set_parent(clk, uart_pll); in pxa910_clk_init()
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/linux/drivers/clk/spear/
A Dspear3xx_clock.c143 struct clk *clk; in spear300_clk_init() local
173 struct clk *clk; in spear310_clk_init() local
177 clk_register_clkdev(clk, "emi", NULL); in spear310_clk_init()
185 clk_register_clkdev(clk, NULL, "tdm"); in spear310_clk_init()
249 struct clk *ras_apb_clk) in spear320_clk_init()
251 struct clk *clk; in spear320_clk_init() local
263 clk_register_clkdev(clk, "emi", NULL); in spear320_clk_init()
347 clk_set_parent(clk, ras_apb_clk); in spear320_clk_init()
356 clk_set_parent(clk, ras_apb_clk); in spear320_clk_init()
392 struct clk *clk, *clk1, *ras_apb_clk; in spear3xx_clk_init() local
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A Dspear1310_clock.c388 struct clk *clk, *clk1; in spear1310_clk_init() local
489 clk_register_clkdev(clk, "ddr_clk", NULL); in spear1310_clk_init()
494 clk_register_clkdev(clk, "cpu_clk", NULL); in spear1310_clk_init()
502 clk_register_clkdev(clk, NULL, "smp_twd"); in spear1310_clk_init()
506 clk_register_clkdev(clk, "ahb_clk", NULL); in spear1310_clk_init()
521 clk_register_clkdev(clk, NULL, "gpt0"); in spear1310_clk_init()
531 clk_register_clkdev(clk, NULL, "gpt1"); in spear1310_clk_init()
541 clk_register_clkdev(clk, NULL, "gpt2"); in spear1310_clk_init()
551 clk_register_clkdev(clk, NULL, "gpt3"); in spear1310_clk_init()
611 clk_register_clkdev(clk, NULL, "c3"); in spear1310_clk_init()
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A Dspear1340_clock.c445 struct clk *clk, *clk1; in spear1340_clk_init() local
546 clk_register_clkdev(clk, "ddr_clk", NULL); in spear1340_clk_init()
567 clk_register_clkdev(clk, "cpu_clk", NULL); in spear1340_clk_init()
579 clk_register_clkdev(clk, NULL, "smp_twd"); in spear1340_clk_init()
585 clk_register_clkdev(clk, "ahb_clk", NULL); in spear1340_clk_init()
589 clk_register_clkdev(clk, "apb_clk", NULL); in spear1340_clk_init()
600 clk_register_clkdev(clk, NULL, "gpt0"); in spear1340_clk_init()
610 clk_register_clkdev(clk, NULL, "gpt1"); in spear1340_clk_init()
620 clk_register_clkdev(clk, NULL, "gpt2"); in spear1340_clk_init()
630 clk_register_clkdev(clk, NULL, "gpt3"); in spear1340_clk_init()
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A Dspear6xx_clock.c118 struct clk *clk, *clk1; in spear6xx_clk_init() local
134 clk_register_clkdev(clk, "pll3_clk", NULL); in spear6xx_clk_init()
155 clk_register_clkdev(clk, "cpu_clk", NULL); in spear6xx_clk_init()
160 clk_register_clkdev(clk, "ahb_clk", NULL); in spear6xx_clk_init()
196 clk_register_clkdev(clk, NULL, "firda"); in spear6xx_clk_init()
212 clk_register_clkdev(clk, NULL, "clcd"); in spear6xx_clk_init()
222 clk_register_clkdev(clk, NULL, "gpt0"); in spear6xx_clk_init()
231 clk_register_clkdev(clk, NULL, "gpt1"); in spear6xx_clk_init()
244 clk_register_clkdev(clk, NULL, "gpt2"); in spear6xx_clk_init()
257 clk_register_clkdev(clk, NULL, "gpt3"); in spear6xx_clk_init()
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/linux/arch/mips/lantiq/
A Dclk.c62 return clk && !IS_ERR(clk); in clk_good()
84 if (clk->rates && *clk->rates) { in clk_set_rate()
104 if (clk->rates && *clk->rates) { in clk_round_rate()
117 int clk_enable(struct clk *clk) in clk_enable() argument
123 return clk->enable(clk); in clk_enable()
129 void clk_disable(struct clk *clk) in clk_disable() argument
135 clk->disable(clk); in clk_disable()
145 return clk->activate(clk); in clk_activate()
157 clk->deactivate(clk); in clk_deactivate()
161 struct clk *clk_get_parent(struct clk *clk) in clk_get_parent() argument
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/linux/drivers/clk/
A Dbuilt-in.a3 clk-devres.o/
4 clk-bulk.o/
6 clk.o/
7 clk-divider.o/
10 clk-gate.o/
12 clk-mux.o/
15 clk-gpio.o/
16 clk-conf.o/
21 clk-pwm.o/
26 clk-scmi.o/
[all …]
A D.built-in.a.cmd1 …clk/built-in.a := echo >/dev/null; rm -f drivers/clk/built-in.a; /usr/bin/ccache /home/test/worksp…
/linux/arch/m68k/coldfire/
A Dclk.c31 void __clk_init_enabled(struct clk *clk) in __clk_init_enabled() argument
34 clk->clk_ops->enable(clk); in __clk_init_enabled()
37 void __clk_init_disabled(struct clk *clk) in __clk_init_disabled() argument
40 clk->clk_ops->disable(clk); in __clk_init_disabled()
43 static void __clk_enable0(struct clk *clk) in __clk_enable0() argument
76 int clk_enable(struct clk *clk) in clk_enable() argument
85 clk->clk_ops->enable(clk); in clk_enable()
92 void clk_disable(struct clk *clk) in clk_disable() argument
101 clk->clk_ops->disable(clk); in clk_disable()
130 int clk_set_parent(struct clk *clk, struct clk *parent) in clk_set_parent() argument
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