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Searched refs:clk_divider_ops (Results 1 – 25 of 34) sorted by relevance

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/linux/drivers/clk/st/
A Dclk-flexgen.c149 mid_rate = clk_divider_ops.recalc_rate(pdiv_hw, parent_rate); in flexgen_recalc_rate()
151 return clk_divider_ops.recalc_rate(fdiv_hw, mid_rate); in flexgen_recalc_rate()
184 clk_divider_ops.set_rate(pdiv_hw, parent_rate, parent_rate); in flexgen_set_rate()
185 ret = clk_divider_ops.set_rate(fdiv_hw, rate, rate * div); in flexgen_set_rate()
187 clk_divider_ops.set_rate(fdiv_hw, parent_rate, parent_rate); in flexgen_set_rate()
188 ret = clk_divider_ops.set_rate(pdiv_hw, rate, rate * div); in flexgen_set_rate()
A Dclkgen-pll.c736 &div->hw, &clk_divider_ops, in clkgen_odf_register()
/linux/drivers/clk/mmp/
A Dclk-audio.c263 &priv->sspa_mux.hw, &clk_divider_ops, in register_clocks()
285 &priv->sspa_mux.hw, &clk_divider_ops, 0); in register_clocks()
316 &priv->sspa1_mux.hw, &clk_divider_ops, 0); in register_clocks()
/linux/drivers/clk/
A Dclk-fsl-sai.c64 &clk_divider_ops, in fsl_sai_clk_probe()
A Dclk-divider.c522 const struct clk_ops clk_divider_ops = { variable
528 EXPORT_SYMBOL_GPL(clk_divider_ops);
565 init.ops = &clk_divider_ops; in __clk_hw_register_divider()
A Dclk-stm32h7.c396 gcfg->div->ops : &clk_divider_ops; in get_cfg_composite_div()
845 return clk_divider_ops.recalc_rate(hw, parent_rate); in odf_divider_recalc_rate()
851 return clk_divider_ops.determine_rate(hw, req); in odf_divider_determine_rate()
868 ret = clk_divider_ops.set_rate(hw, rate, parent_rate); in odf_divider_set_rate()
A Dclk-stm32f4.c709 return clk_divider_ops.recalc_rate(hw, parent_rate); in stm32f4_pll_div_recalc_rate()
715 return clk_divider_ops.determine_rate(hw, req); in stm32f4_pll_div_determine_rate()
731 ret = clk_divider_ops.set_rate(hw, rate, parent_rate); in stm32f4_pll_div_set_rate()
A Dclk-stm32mp1.c643 div_ops = &clk_divider_ops; in clk_stm32_register_composite()
1063 return clk_divider_ops.recalc_rate(hw, parent_rate); in clk_divider_rtc_recalc_rate()
1072 return clk_divider_ops.set_rate(hw, rate, parent_rate); in clk_divider_rtc_set_rate()
1080 return clk_divider_ops.determine_rate(hw, req); in clk_divider_rtc_determine_rate()
/linux/drivers/clk/sunxi/
A Dclk-sun8i-mbus.c79 &div->hw, &clk_divider_ops, in sun8i_a23_mbus_setup()
A Dclk-a10-ve.c122 &div->hw, &clk_divider_ops, in sun4i_ve_clk_setup()
A Dclk-sun4i-display.c161 data->has_div ? &clk_divider_ops : NULL, in sun4i_a10_display_init()
/linux/drivers/clk/mxs/
A Dclk-div.c96 div->ops = &clk_divider_ops; in mxs_clk_div()
/linux/drivers/clk/imx/
A Dclk-fixup-div.c115 fixup_div->ops = &clk_divider_ops; in imx_clk_hw_fixup_divider()
A Dclk-busy.c96 busy->div_ops = &clk_divider_ops; in imx_clk_hw_busy_divider()
A Dclk-divider-gate.c70 return clk_divider_ops.determine_rate(hw, req); in clk_divider_determine_rate()
A Dclk-composite-8m.c207 divider_ops = &clk_divider_ops; in __imx8m_clk_hw_composite()
/linux/drivers/mmc/host/
A Dmeson-mx-sdhc-clkc.c111 &clk_divider_ops, in meson_mx_sdhc_register_clkc()
/linux/drivers/clk/davinci/
A Dpll.c242 const struct clk_ops *divider_ops = &clk_divider_ops; in davinci_pll_div_register()
619 &divider->hw, &clk_divider_ops, in davinci_pll_obsclk_register()
681 const struct clk_ops *divider_ops = &clk_divider_ops; in davinci_pll_sysclk_register()
/linux/drivers/spi/
A Dspi-meson-spicc.c569 init.ops = &clk_divider_ops; in meson_spicc_clk_init()
619 init.ops = &clk_divider_ops; in meson_spicc_clk_init()
/linux/drivers/clk/renesas/
A Drcar-cpg-lib.c308 &rpc->div.hw, &clk_divider_ops, in cpg_rpc_clk_register()
A Drcar-gen2-cpg.c237 &div->hw, &clk_divider_ops, in cpg_adsp_clk_register()
/linux/drivers/clk/mediatek/
A Dclk-mtk.c228 div_ops = &clk_divider_ops; in mtk_clk_register_composite()
/linux/drivers/net/ethernet/stmicro/stmmac/
A Ddwmac-meson8b.c185 &clk_divider_ops, in meson8b_init_rgmii_tx_clk()
/linux/drivers/clk/nxp/
A Dclk-lpc18xx-cgu.c549 &clk->div.hw, &clk_divider_ops, in lpc18xx_cgu_register_div()
/linux/drivers/clk/rockchip/
A Dclk.c102 : &clk_divider_ops; in rockchip_clk_register_branch()

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