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Searched refs:clk_gate (Results 1 – 25 of 54) sorted by relevance

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/linux/drivers/clk/
A Dclk-gate.c26 static inline u32 clk_gate_readl(struct clk_gate *gate) in clk_gate_readl()
34 static inline void clk_gate_writel(struct clk_gate *gate, u32 val) in clk_gate_writel()
57 struct clk_gate *gate = to_clk_gate(hw); in clk_gate_endisable()
105 struct clk_gate *gate = to_clk_gate(hw); in clk_gate_is_enabled()
134 struct clk_gate *gate; in __clk_hw_register_gate()
201 struct clk_gate *gate; in clk_unregister_gate()
217 struct clk_gate *gate; in clk_hw_unregister_gate()
A Dclk-stm32f4.c518 struct clk_gate gate;
611 struct clk_gate *gate = to_clk_gate(hw); in stm32f4_pll_enable()
637 struct clk_gate *gate = to_clk_gate(hw); in stm32f4_pll_recalc()
649 struct clk_gate *gate = to_clk_gate(hw); in stm32f4_pll_round_rate()
666 struct clk_gate *gate = to_clk_gate(hw); in stm32f4_pll_set_rate()
913 struct clk_gate gate;
921 struct clk_gate *gate = to_clk_gate(hw); in rgclk_enable()
1062 struct clk_gate *gate; in stm32_register_cclk()
1633 struct clk_gate *gate = NULL; in stm32_register_aux_clk()
A Dclk-fsl-sai.c25 struct clk_gate gate;
/linux/drivers/clk/socfpga/
A Dclk-gate-a10.c97 u32 clk_gate[2]; in __socfpga_gate_init() local
112 rc = of_property_read_u32_array(node, "clk-gate", clk_gate, 2); in __socfpga_gate_init()
114 clk_gate[0] = 0; in __socfpga_gate_init()
116 if (clk_gate[0]) { in __socfpga_gate_init()
117 socfpga_clk->hw.reg = clk_mgr_a10_base_addr + clk_gate[0]; in __socfpga_gate_init()
118 socfpga_clk->hw.bit_idx = clk_gate[1]; in __socfpga_gate_init()
A Dclk-gate.c173 u32 clk_gate[2]; in socfpga_gate_init() local
194 rc = of_property_read_u32_array(node, "clk-gate", clk_gate, 2); in socfpga_gate_init()
196 clk_gate[0] = 0; in socfpga_gate_init()
198 if (clk_gate[0]) { in socfpga_gate_init()
199 socfpga_clk->hw.reg = clk_mgr_base_addr + clk_gate[0]; in socfpga_gate_init()
200 socfpga_clk->hw.bit_idx = clk_gate[1]; in socfpga_gate_init()
A Dclk.h40 struct clk_gate hw;
44 struct clk_gate hw;
57 struct clk_gate hw;
/linux/drivers/clk/ralink/
A Dclk-mt7621.c97 struct mt7621_gate *clk_gate = to_mt7621_gate(hw); in mt7621_gate_enable() local
98 struct regmap *sysc = clk_gate->priv->sysc; in mt7621_gate_enable()
101 clk_gate->bit_idx, clk_gate->bit_idx); in mt7621_gate_enable()
106 struct mt7621_gate *clk_gate = to_mt7621_gate(hw); in mt7621_gate_disable() local
107 struct regmap *sysc = clk_gate->priv->sysc; in mt7621_gate_disable()
109 regmap_update_bits(sysc, SYSC_REG_CLKCFG1, clk_gate->bit_idx, 0); in mt7621_gate_disable()
114 struct mt7621_gate *clk_gate = to_mt7621_gate(hw); in mt7621_gate_is_enabled() local
115 struct regmap *sysc = clk_gate->priv->sysc; in mt7621_gate_is_enabled()
121 return val & BIT(clk_gate->bit_idx); in mt7621_gate_is_enabled()
/linux/drivers/mmc/host/
A Dmeson-mx-sdhc-clkc.c20 struct clk_gate mod_clk_en;
21 struct clk_gate tx_clk_en;
22 struct clk_gate rx_clk_en;
23 struct clk_gate sd_clk_en;
/linux/drivers/clk/imx/
A Dclk-gate-exclusive.c25 struct clk_gate gate;
31 struct clk_gate *gate = to_clk_gate(hw); in clk_gate_exclusive_enable()
62 struct clk_gate *gate; in imx_clk_hw_gate_exclusive()
A Dclk-composite-7ulp.c31 struct clk_gate *gate = to_clk_gate(hw); in pcc_gate_enable()
78 struct clk_gate *gate = NULL; in imx_ulp_clk_hw_composite()
/linux/drivers/clk/sunxi/
A Dclk-a10-hosc.c21 struct clk_gate *gate; in sun4i_osc_clk_setup()
32 gate = kzalloc(sizeof(struct clk_gate), GFP_KERNEL); in sun4i_osc_clk_setup()
A Dclk-a20-gmac.c56 struct clk_gate *gate; in sun7i_a20_gmac_clk_setup()
69 gate = kzalloc(sizeof(struct clk_gate), GFP_KERNEL); in sun7i_a20_gmac_clk_setup()
A Dclk-a10-pll2.c45 struct clk_gate *gate; in sun4i_pll2_setup()
74 gate = kzalloc(sizeof(struct clk_gate), GFP_KERNEL); in sun4i_pll2_setup()
A Dclk-factors.h51 struct clk_gate *gate;
A Dclk-a10-mod1.c25 struct clk_gate *gate; in sun4i_mod1_clk_setup()
A Dclk-factors.c183 struct clk_gate *gate = NULL; in __sunxi_factors_register()
216 gate = kzalloc(sizeof(struct clk_gate), GFP_KERNEL); in __sunxi_factors_register()
A Dclk-sun4i-pll3.c25 struct clk_gate *gate; in sun4i_a10_pll3_setup()
/linux/drivers/clk/st/
A Dclk-flexgen.c37 struct clk_gate pgate;
41 struct clk_gate fgate;
45 struct clk_gate sync;
51 #define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw)
161 struct clk_gate *config = to_clk_gate(sync_hw); in flexgen_set_rate()
/linux/drivers/staging/media/hantro/
A Dhantro_postproc.c39 .clk_gate = {G1_REG_PP_DEV_CONFIG, 1, 0x1},
96 HANTRO_PP_REG_WRITE(vpu, clk_gate, 0x1); in hantro_postproc_enable()
/linux/drivers/clk/nxp/
A Dclk-lpc18xx-ccu.c43 struct clk_gate gate;
139 struct clk_gate *gate = to_clk_gate(hw); in lpc18xx_ccu_gate_endisable()
/linux/drivers/clk/mmp/
A Dclk-audio.c67 struct clk_gate sysclk_gate;
68 struct clk_gate sspa0_gate;
69 struct clk_gate sspa1_gate;
/linux/drivers/clk/rockchip/
A Dclk.c50 struct clk_gate *gate = NULL; in rockchip_clk_register_branch()
127 struct clk_gate gate;
206 struct clk_gate *gate = NULL; in rockchip_clk_register_frac_branch()
311 struct clk_gate *gate = NULL; in rockchip_clk_register_factor_branch()
/linux/drivers/iio/adc/
A Dmeson_saradc.c275 struct clk_gate clk_gate; member
689 priv->clk_gate.reg = base + MESON_SAR_ADC_REG3; in meson_sar_adc_clk_init()
690 priv->clk_gate.bit_idx = __ffs(MESON_SAR_ADC_REG3_CLK_EN); in meson_sar_adc_clk_init()
691 priv->clk_gate.hw.init = &init; in meson_sar_adc_clk_init()
693 priv->adc_clk = devm_clk_register(&indio_dev->dev, &priv->clk_gate.hw); in meson_sar_adc_clk_init()
/linux/drivers/clk/renesas/
A Drcar-cpg-lib.c272 struct clk_gate gate;
322 struct clk_gate gate;
A Drcar-gen2-cpg.c169 struct clk_gate *gate; in cpg_rcan_clk_register()
213 struct clk_gate *gate; in cpg_adsp_clk_register()

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