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/linux/drivers/clk/zynqmp/
A Dpll.c21 u32 clk_id; member
52 u32 clk_id = clk->clk_id; in zynqmp_pll_get_mode() local
75 u32 clk_id = clk->clk_id; in zynqmp_pll_set_mode() local
138 u32 clk_id = clk->clk_id; in zynqmp_pll_recalc_rate() local
182 u32 clk_id = clk->clk_id; in zynqmp_pll_set_rate() local
230 u32 clk_id = clk->clk_id; in zynqmp_pll_is_enabled() local
254 u32 clk_id = clk->clk_id; in zynqmp_pll_enable() local
266 ret = zynqmp_pm_clock_enable(clk_id); in zynqmp_pll_enable()
282 u32 clk_id = clk->clk_id; in zynqmp_pll_disable() local
288 ret = zynqmp_pm_clock_disable(clk_id); in zynqmp_pll_disable()
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A Dclk-gate-zynqmp.c23 u32 clk_id; member
38 u32 clk_id = gate->clk_id; in zynqmp_clk_gate_enable() local
41 ret = zynqmp_pm_clock_enable(clk_id); in zynqmp_clk_gate_enable()
58 u32 clk_id = gate->clk_id; in zynqmp_clk_gate_disable() local
61 ret = zynqmp_pm_clock_disable(clk_id); in zynqmp_clk_gate_disable()
78 u32 clk_id = gate->clk_id; in zynqmp_clk_gate_is_enabled() local
81 ret = zynqmp_pm_clock_getstate(clk_id, &state); in zynqmp_clk_gate_is_enabled()
107 struct clk_hw *zynqmp_clk_register_gate(const char *name, u32 clk_id, in zynqmp_clk_register_gate() argument
133 gate->clk_id = clk_id; in zynqmp_clk_register_gate()
A Dclkc.c78 u32 clk_id; member
147 if (clk_id >= clock_max_idx) in zynqmp_is_valid_clock()
150 return clock[clk_id].valid; in zynqmp_is_valid_clock()
186 *type = clock[clk_id].type; in zynqmp_get_clock_type()
318 qdata.arg1 = clk_id; in zynqmp_clk_register_fixed_factor()
449 ret = zynqmp_pm_clock_get_topology(clock[clk_id].clk_id, j, in zynqmp_clock_get_topology()
516 ret = zynqmp_pm_clock_get_parents(clock[clk_id].clk_id, j, in zynqmp_clock_get_parents()
548 clk_nodes = clock[clk_id].node; in zynqmp_get_parent_list()
549 parents = clock[clk_id].parent; in zynqmp_get_parent_list()
591 nodes = clock[clk_id].node; in zynqmp_register_clk_topology()
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A Dclk-mux-zynqmp.c32 u32 clk_id; member
47 u32 clk_id = mux->clk_id; in zynqmp_clk_mux_get_parent() local
51 ret = zynqmp_pm_clock_getparent(clk_id, &val); in zynqmp_clk_mux_get_parent()
77 u32 clk_id = mux->clk_id; in zynqmp_clk_mux_set_parent() local
80 ret = zynqmp_pm_clock_setparent(clk_id, index); in zynqmp_clk_mux_set_parent()
131 struct clk_hw *zynqmp_clk_register_mux(const char *name, u32 clk_id, in zynqmp_clk_register_mux() argument
157 mux->clk_id = clk_id; in zynqmp_clk_register_mux()
A Ddivider.c44 u32 clk_id; member
84 u32 clk_id = divider->clk_id; in zynqmp_clk_divider_recalc_rate() local
89 ret = zynqmp_pm_clock_getdivider(clk_id, &div); in zynqmp_clk_divider_recalc_rate()
170 u32 clk_id = divider->clk_id; in zynqmp_clk_divider_round_rate() local
177 ret = zynqmp_pm_clock_getdivider(clk_id, &bestdiv); in zynqmp_clk_divider_round_rate()
227 u32 clk_id = divider->clk_id; in zynqmp_clk_divider_set_rate() local
244 ret = zynqmp_pm_clock_setdivider(clk_id, div); in zynqmp_clk_divider_set_rate()
272 static u32 zynqmp_clk_get_max_divisor(u32 clk_id, u32 type) in zynqmp_clk_get_max_divisor() argument
279 qdata.arg1 = clk_id; in zynqmp_clk_get_max_divisor()
326 u32 clk_id, in zynqmp_clk_register_divider() argument
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A Dclk-zynqmp.h70 struct clk_hw *zynqmp_clk_register_pll(const char *name, u32 clk_id,
75 struct clk_hw *zynqmp_clk_register_gate(const char *name, u32 clk_id,
81 u32 clk_id,
86 struct clk_hw *zynqmp_clk_register_mux(const char *name, u32 clk_id,
92 u32 clk_id,
/linux/drivers/clk/keystone/
A Dsci-clk.c63 u32 clk_id; member
367 if (ca->dev_id == cb->dev_id && ca->clk_id == cb->clk_id) in _cmp_sci_clk()
370 (ca->dev_id == cb->dev_id && ca->clk_id > cb->clk_id)) in _cmp_sci_clk()
435 int clk_id = 0; in ti_sci_scan_clocks_from_fw() local
454 clk_id = 0; in ti_sci_scan_clocks_from_fw()
457 clk_id++; in ti_sci_scan_clocks_from_fw()
480 sci_clk->clk_id = clk_id; in ti_sci_scan_clocks_from_fw()
486 clk_id++; in ti_sci_scan_clocks_from_fw()
526 int clk_id; in ti_sci_scan_clocks_from_dt() local
602 sci_clk->clk_id = clk_id++; in ti_sci_scan_clocks_from_dt()
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/linux/drivers/soc/mediatek/
A Dmtk-scpsys.c81 enum clk_id { enum
129 enum clk_id clk_id[MAX_CLKS]; member
572 .clk_id = {CLK_MM},
591 .clk_id = {CLK_MM},
600 .clk_id = {CLK_MM},
648 .clk_id = {CLK_MM},
675 .clk_id = {CLK_MM},
788 .clk_id = {CLK_MM},
926 .clk_id = {CLK_MM},
942 .clk_id = {CLK_MM},
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/linux/tools/testing/selftests/timens/
A Dtimens.h64 static inline int _settime(clockid_t clk_id, time_t offset) in _settime() argument
69 if (clk_id == CLOCK_MONOTONIC_COARSE || clk_id == CLOCK_MONOTONIC_RAW) in _settime()
70 clk_id = CLOCK_MONOTONIC; in _settime()
72 len = snprintf(buf, sizeof(buf), "%d %ld 0", clk_id, offset); in _settime()
86 static inline int _gettime(clockid_t clk_id, struct timespec *res, bool raw_syscall) in _gettime() argument
91 if (clock_gettime(clk_id, res)) { in _gettime()
92 pr_perror("clock_gettime(%d)", (int)clk_id); in _gettime()
98 err = syscall(SYS_clock_gettime, clk_id, res); in _gettime()
100 pr_perror("syscall(SYS_clock_gettime(%d))", (int)clk_id); in _gettime()
/linux/drivers/firmware/arm_scmi/
A Dclock.c104 u32 clk_id, struct scmi_clock_info *clk) in scmi_clock_attributes_get() argument
111 sizeof(clk_id), sizeof(*attr), &t); in scmi_clock_attributes_get()
115 put_unaligned_le32(clk_id, t->tx.buf); in scmi_clock_attributes_get()
162 clk_desc->id = cpu_to_le32(clk_id); in scmi_clock_describe_rates_get()
219 u32 clk_id, u64 *value) in scmi_clock_rate_get() argument
229 put_unaligned_le32(clk_id, t->tx.buf); in scmi_clock_rate_get()
240 u32 clk_id, u64 rate) in scmi_clock_rate_set() argument
258 cfg->id = cpu_to_le32(clk_id); in scmi_clock_rate_set()
288 cfg->id = cpu_to_le32(clk_id); in scmi_clock_config_set()
304 return scmi_clock_config_set(ph, clk_id, 0); in scmi_clock_disable()
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/linux/tools/testing/selftests/vDSO/
A Dvdso_test_abi.c32 typedef long (*vdso_clock_gettime_t)(clockid_t clk_id, struct timespec *ts);
33 typedef long (*vdso_clock_getres_t)(clockid_t clk_id, struct timespec *ts);
61 static int vdso_test_clock_gettime(clockid_t clk_id) in vdso_test_clock_gettime() argument
73 long ret = vdso_clock_gettime(clk_id, &ts); in vdso_test_clock_gettime()
110 static int vdso_test_clock_getres(clockid_t clk_id) in vdso_test_clock_getres() argument
122 long ret = vdso_clock_getres(clk_id, &ts); in vdso_test_clock_getres()
132 ret = syscall(SYS_clock_getres, clk_id, &sys_ts); in vdso_test_clock_getres()
/linux/sound/soc/ti/
A Domap-dmic.c279 static int omap_dmic_select_fclk(struct omap_dmic *dmic, int clk_id, in omap_dmic_select_fclk() argument
298 if (dmic->sysclk == clk_id) { in omap_dmic_select_fclk()
309 switch (clk_id) { in omap_dmic_select_fclk()
320 dev_err(dmic->dev, "fclk clk_id (%d) not supported\n", clk_id); in omap_dmic_select_fclk()
353 dmic->sysclk = clk_id; in omap_dmic_select_fclk()
363 static int omap_dmic_select_outclk(struct omap_dmic *dmic, int clk_id, in omap_dmic_select_outclk() argument
368 if (clk_id != OMAP_DMIC_ABE_DMIC_CLK) { in omap_dmic_select_outclk()
370 clk_id); in omap_dmic_select_outclk()
390 static int omap_dmic_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id, in omap_dmic_set_dai_sysclk() argument
396 return omap_dmic_select_fclk(dmic, clk_id, freq); in omap_dmic_set_dai_sysclk()
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/linux/drivers/firmware/
A Dti_sci.c968 if (clk_id < 255) { in ti_sci_set_clock_state()
969 req->clk_id = clk_id; in ti_sci_set_clock_state()
971 req->clk_id = 255; in ti_sci_set_clock_state()
1036 if (clk_id < 255) { in ti_sci_cmd_get_clock_state()
1037 req->clk_id = clk_id; in ti_sci_cmd_get_clock_state()
1268 req->clk_id = clk_id; in ti_sci_cmd_clk_set_parent()
1336 req->clk_id = clk_id; in ti_sci_cmd_clk_get_parent()
1406 req->clk_id = clk_id; in ti_sci_cmd_clk_get_num_parents()
1485 req->clk_id = clk_id; in ti_sci_cmd_clk_get_match_freq()
1561 req->clk_id = clk_id; in ti_sci_cmd_clk_set_freq()
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A Dti_sci.h272 u8 clk_id; member
298 u8 clk_id; member
341 u8 clk_id; member
363 u8 clk_id; member
401 u8 clk_id; member
452 u8 clk_id; member
511 u8 clk_id; member
532 u8 clk_id; member
/linux/sound/soc/codecs/
A Dadav80x.c538 int clk_id, int source, in adav80x_set_sysclk() argument
545 switch (clk_id) { in adav80x_set_sysclk()
558 if (adav80x->clk_src != clk_id) { in adav80x_set_sysclk()
561 adav80x->clk_src = clk_id; in adav80x_set_sysclk()
562 if (clk_id == ADAV80X_CLK_XTAL) in adav80x_set_sysclk()
563 clk_id = ADAV80X_CLK_XIN; in adav80x_set_sysclk()
566 ADAV80X_ICLK_CTRL1_ADC_SRC(clk_id) | in adav80x_set_sysclk()
580 switch (clk_id) { in adav80x_set_sysclk()
589 clk_id -= ADAV80X_CLK_SYSCLK1; in adav80x_set_sysclk()
595 adav80x->sysclk_pd[clk_id] = true; in adav80x_set_sysclk()
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/linux/drivers/clk/tegra/
A Dclk-tegra-audio.c35 int clk_id; member
41 .clk_id = tegra_clk_ ## _name,\
66 int clk_id; member
77 .clk_id = tegra_clk_ ## _name ## _2x,\
181 dt_clk = tegra_lookup_dt_id(info->clk_id, tegra_clks); in tegra_audio_clk_init()
207 dt_clk = tegra_lookup_dt_id(data->clk_id, tegra_clks); in tegra_audio_clk_init()
231 dt_clk = tegra_lookup_dt_id(data->clk_id, tegra_clks); in tegra_audio_clk_init()
A Dclk.c257 for (; dup_list->clk_id < clk_max; dup_list++) { in tegra_init_dup_clks()
258 clk = clks[dup_list->clk_id]; in tegra_init_dup_clks()
269 for (; tbl->clk_id < clk_max; tbl++) { in tegra_init_from_table()
270 clk = clks[tbl->clk_id]; in tegra_init_from_table()
273 __func__, PTR_ERR(clk), tbl->clk_id); in tegra_init_from_table()
366 struct clk ** __init tegra_lookup_dt_id(int clk_id, in tegra_lookup_dt_id() argument
369 if (tegra_clk[clk_id].present) in tegra_lookup_dt_id()
370 return &clks[tegra_clk[clk_id].dt_id]; in tegra_lookup_dt_id()
/linux/drivers/clk/baikal-t1/
A Dclk-ccu-pll.c82 unsigned int clk_id) in ccu_pll_find_desc() argument
89 if (pll && pll->id == clk_id) in ccu_pll_find_desc()
131 unsigned int clk_id; in ccu_pll_of_clk_hw_get() local
133 clk_id = clkspec->args[0]; in ccu_pll_of_clk_hw_get()
134 pll = ccu_pll_find_desc(data, clk_id); in ccu_pll_of_clk_hw_get()
136 pr_info("Invalid PLL clock ID %d specified\n", clk_id); in ccu_pll_of_clk_hw_get()
A Dclk-ccu-div.c91 .clk_id = _clk_id \
110 unsigned int clk_id; member
248 unsigned int clk_id) in ccu_div_find_desc() argument
255 if (div && div->id == clk_id) in ccu_div_find_desc()
279 div = ccu_div_find_desc(data, map->clk_id); in ccu_div_reset()
281 pr_err("Invalid clock ID %d in mapping\n", map->clk_id); in ccu_div_reset()
363 unsigned int clk_id; in ccu_div_of_clk_hw_get() local
365 clk_id = clkspec->args[0]; in ccu_div_of_clk_hw_get()
366 div = ccu_div_find_desc(data, clk_id); in ccu_div_of_clk_hw_get()
368 pr_info("Invalid clock ID %d specified\n", clk_id); in ccu_div_of_clk_hw_get()
/linux/sound/soc/qcom/qdsp6/
A Dq6prm.c111 static int q6prm_request_lpass_clock(struct device *dev, int clk_id, int clk_attr, int clk_root, in q6prm_request_lpass_clock() argument
136 req->clock_id.clock_id = clk_id; in q6prm_request_lpass_clock()
148 static int q6prm_release_lpass_clock(struct device *dev, int clk_id, int clk_attr, int clk_root, in q6prm_release_lpass_clock() argument
173 rel->clock_id.clock_id = clk_id; in q6prm_release_lpass_clock()
182 int q6prm_set_lpass_clock(struct device *dev, int clk_id, int clk_attr, int clk_root, in q6prm_set_lpass_clock() argument
186 return q6prm_request_lpass_clock(dev, clk_id, clk_attr, clk_attr, freq); in q6prm_set_lpass_clock()
188 return q6prm_release_lpass_clock(dev, clk_id, clk_attr, clk_attr, freq); in q6prm_set_lpass_clock()
A Dq6dsp-lpass-clocks.h7 int clk_id; member
14 .clk_id = id, \
22 int (*lpass_set_clk)(struct device *dev, int clk_id, int attr,
/linux/tools/perf/util/
A Dclockid.c55 static int get_clockid_res(clockid_t clk_id, u64 *res_ns) in get_clockid_res() argument
60 if (!clock_getres(clk_id, &res)) in get_clockid_res()
110 const char *clockid_name(clockid_t clk_id) in clockid_name() argument
115 if (cm->clockid == clk_id) in clockid_name()
/linux/drivers/gpu/drm/amd/pm/swsmu/smu13/
A Dsmu_v13_0.c486 uint8_t clk_id, in smu_v13_0_atom_get_smu_clockinfo() argument
494 input.clk_id = clk_id; in smu_v13_0_atom_get_smu_clockinfo()
814 int clk_id; in smu_v13_0_get_max_sustainable_clock() local
823 if (clk_id < 0) in smu_v13_0_get_max_sustainable_clock()
1526 if (clk_id < 0) { in smu_v13_0_get_dpm_ultimate_freq()
1563 if (clk_id < 0) in smu_v13_0_set_soft_freq_limited_range()
1564 return clk_id; in smu_v13_0_set_soft_freq_limited_range()
1609 if (clk_id < 0) in smu_v13_0_set_hard_freq_limited_range()
1610 return clk_id; in smu_v13_0_set_hard_freq_limited_range()
1769 if (clk_id < 0) in smu_v13_0_get_dpm_freq_by_index()
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/linux/drivers/base/regmap/
A Dregmap-mmio.c265 const char *clk_id, in regmap_mmio_gen_context() argument
373 if (clk_id == NULL) in regmap_mmio_gen_context()
376 ctx->clk = clk_get(dev, clk_id); in regmap_mmio_gen_context()
396 struct regmap *__regmap_init_mmio_clk(struct device *dev, const char *clk_id, in __regmap_init_mmio_clk() argument
404 ctx = regmap_mmio_gen_context(dev, clk_id, regs, config); in __regmap_init_mmio_clk()
414 const char *clk_id, in __devm_regmap_init_mmio_clk() argument
422 ctx = regmap_mmio_gen_context(dev, clk_id, regs, config); in __devm_regmap_init_mmio_clk()
/linux/drivers/gpu/drm/amd/pm/swsmu/smu11/
A Dsmu_v11_0.c523 uint8_t clk_id, in smu_v11_0_atom_get_smu_clockinfo() argument
531 input.clk_id = clk_id; in smu_v11_0_atom_get_smu_clockinfo()
841 int clk_id; in smu_v11_0_get_max_sustainable_clock() local
850 if (clk_id < 0) in smu_v11_0_get_max_sustainable_clock()
1774 if (clk_id < 0) { in smu_v11_0_get_dpm_ultimate_freq()
1811 if (clk_id < 0) in smu_v11_0_set_soft_freq_limited_range()
1812 return clk_id; in smu_v11_0_set_soft_freq_limited_range()
1857 if (clk_id < 0) in smu_v11_0_set_hard_freq_limited_range()
1858 return clk_id; in smu_v11_0_set_hard_freq_limited_range()
2014 if (clk_id < 0) in smu_v11_0_get_dpm_freq_by_index()
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