Searched refs:clk_pll0 (Results 1 – 6 of 6) sorted by relevance
33 - const: clk_pll065 clock-names = "clk_lcd", "clk_pll0";
727 phy->clk_pll0 = of_clk_get_by_name(node, "pll-0"); in sun8i_hdmi_phy_probe()728 if (IS_ERR(phy->clk_pll0)) { in sun8i_hdmi_phy_probe()730 ret = PTR_ERR(phy->clk_pll0); in sun8i_hdmi_phy_probe()758 clk_put(phy->clk_pll0); in sun8i_hdmi_phy_probe()773 clk_put(phy->clk_pll0); in sun8i_hdmi_phy_remove()
150 parents[0] = __clk_get_name(phy->clk_pll0); in sun8i_phy_clk_create()
170 struct clk *clk_pll0; member
51 kmb->kmb_clk.clk_pll0 = devm_clk_get(dev, "clk_pll0"); in kmb_initialize_clocks()52 if (IS_ERR(kmb->kmb_clk.clk_pll0)) { in kmb_initialize_clocks()54 return PTR_ERR(kmb->kmb_clk.clk_pll0); in kmb_initialize_clocks()56 kmb->sys_clk_mhz = clk_get_rate(kmb->kmb_clk.clk_pll0) / 1000000; in kmb_initialize_clocks()
46 struct clk *clk_pll0; member
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