Searched refs:clksel (Results 1 – 8 of 8) sorted by relevance
| /linux/drivers/mmc/host/ |
| A D | dw_mmc-exynos.c | 133 u32 clksel; in dw_mci_exynos_set_clksel_timing() local
139 clksel = mci_readl(host, CLKSEL); in dw_mci_exynos_set_clksel_timing()
141 clksel = (clksel & ~SDMMC_CLKSEL_TIMING_MASK) | timing; in dw_mci_exynos_set_clksel_timing()
205 u32 clksel; in dw_mci_exynos_resume_noirq() local
310 clksel = priv->ddr_timing; in dw_mci_exynos_set_ios()
325 clksel = priv->sdr_timing; in dw_mci_exynos_set_ios()
405 u32 clksel; in dw_mci_exynos_set_clksmpl() local
413 clksel = SDMMC_CLKSEL_UP_SAMPLE(clksel, sample); in dw_mci_exynos_set_clksmpl()
424 u32 clksel; in dw_mci_exynos_move_next_clksmpl() local
433 sample = (clksel + 1) & 0x7; in dw_mci_exynos_move_next_clksmpl()
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| /linux/drivers/clocksource/ |
| A D | timer-cadence-ttc.c | 475 int clksel, ret; in ttc_timer_probe() local
503 clksel = readl_relaxed(timer_baseaddr + TTC_CLK_CNTRL_OFFSET); in ttc_timer_probe()
504 clksel = !!(clksel & TTC_CLK_CNTRL_CSRC_MASK); in ttc_timer_probe()
505 clk_cs = of_clk_get(timer, clksel); in ttc_timer_probe()
511 clksel = readl_relaxed(timer_baseaddr + 4 + TTC_CLK_CNTRL_OFFSET); in ttc_timer_probe()
512 clksel = !!(clksel & TTC_CLK_CNTRL_CSRC_MASK); in ttc_timer_probe()
513 clk_ce = of_clk_get(timer, clksel); in ttc_timer_probe()
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| /linux/drivers/clk/rockchip/ |
| A D | clk-cpu.c | 105 const struct rockchip_cpuclk_clksel *clksel = &rate->divs[i]; in rockchip_cpuclk_set_dividers() local
107 if (!clksel->reg) in rockchip_cpuclk_set_dividers()
111 __func__, clksel->reg, clksel->val); in rockchip_cpuclk_set_dividers()
112 writel(clksel->val, cpuclk->reg_base + clksel->reg); in rockchip_cpuclk_set_dividers()
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| /linux/arch/mips/ralink/ |
| A D | rt3883.c | 24 u32 clksel; in ralink_clk_init() local
28 clksel = ((syscfg0 >> RT3883_SYSCFG0_CPUCLK_SHIFT) & in ralink_clk_init()
32 switch (clksel) { in ralink_clk_init()
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| /linux/arch/arm/mach-imx/ |
| A D | mach-imx6q.c | 85 u32 clksel; in imx6q_1588_init() local
110 clksel = clk_is_match(ptp_clk, enet_ref) ? in imx6q_1588_init()
117 clksel); in imx6q_1588_init()
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| /linux/drivers/clk/ |
| A D | clk-qoriq.c | 59 struct clockgen_sourceinfo clksel[NUM_MUX_PARENTS]; member
852 u32 clksel; in mux_set_parent() local
857 clksel = hwc->parent_to_clksel[idx]; in mux_set_parent()
866 u32 clksel; in mux_get_parent() local
871 ret = hwc->clksel_to_parent[clksel]; in mux_get_parent()
899 if (!(hwc->info->clksel[idx].flags & CLKSEL_VALID)) in get_pll_div()
902 pll = hwc->info->clksel[idx].pll; in get_pll_div()
903 div = hwc->info->clksel[idx].div; in get_pll_div()
936 if (hwc->info->clksel[i].flags & CLKSEL_80PCT && in create_mux_common()
975 u32 clksel; in create_one_cmux() local
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| /linux/drivers/gpu/drm/rcar-du/ |
| A D | rcar_lvds.c | 129 u32 clksel; member
134 u32 clksel, bool dot_clock_only) in rcar_lvds_d3_e3_pll_calc() argument
242 pll->clksel = clksel; in rcar_lvds_d3_e3_pll_calc()
276 lvdpllcr = LVDPLLCR_PLLON | pll.clksel | LVDPLLCR_CLKOUT in __rcar_lvds_pll_setup_d3_e3()
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| /linux/drivers/mfd/ |
| A D | asic3.c | 387 unsigned long clksel = 0; in asic3_irq_probe() local
397 clksel |= CLOCK_SEL_CX; in asic3_irq_probe()
399 clksel); in asic3_irq_probe()
949 unsigned long clksel; in asic3_probe() local
978 clksel = 0; in asic3_probe()
979 asic3_write_register(asic, ASIC3_OFFSET(CLOCK, SEL), clksel); in asic3_probe()
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