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Searched refs:cmdq_reg (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/mediatek/
A Dmtk_drm_ddp_comp.c66 struct cmdq_client_reg cmdq_reg; member
70 struct cmdq_client_reg *cmdq_reg, void __iomem *regs, in mtk_ddp_write() argument
75 cmdq_pkt_write(cmdq_pkt, cmdq_reg->subsys, in mtk_ddp_write()
76 cmdq_reg->offset + offset, value); in mtk_ddp_write()
88 cmdq_pkt_write(cmdq_pkt, cmdq_reg->subsys, in mtk_ddp_write_relaxed()
89 cmdq_reg->offset + offset, value); in mtk_ddp_write_relaxed()
96 struct cmdq_client_reg *cmdq_reg, void __iomem *regs, in mtk_ddp_write_mask() argument
101 cmdq_pkt_write_mask(cmdq_pkt, cmdq_reg->subsys, in mtk_ddp_write_mask()
102 cmdq_reg->offset + offset, value, mask); in mtk_ddp_write_mask()
143 cmdq_reg, regs, DISP_DITHER_15); in mtk_dither_set_common()
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A Dmtk_disp_rdma.c65 struct cmdq_client_reg cmdq_reg; member
152 mtk_ddp_write_mask(cmdq_pkt, width, &rdma->cmdq_reg, rdma->regs, in mtk_rdma_config()
154 mtk_ddp_write_mask(cmdq_pkt, height, &rdma->cmdq_reg, rdma->regs, in mtk_rdma_config()
232 mtk_ddp_write_mask(cmdq_pkt, RDMA_MATRIX_ENABLE, &rdma->cmdq_reg, rdma->regs, in mtk_rdma_layer_config()
236 &rdma->cmdq_reg, rdma->regs, DISP_REG_RDMA_SIZE_CON_0, in mtk_rdma_layer_config()
239 mtk_ddp_write_mask(cmdq_pkt, 0, &rdma->cmdq_reg, rdma->regs, in mtk_rdma_layer_config()
243 mtk_ddp_write_relaxed(cmdq_pkt, addr, &rdma->cmdq_reg, rdma->regs, in mtk_rdma_layer_config()
245 mtk_ddp_write_relaxed(cmdq_pkt, pitch, &rdma->cmdq_reg, rdma->regs, in mtk_rdma_layer_config()
247 mtk_ddp_write(cmdq_pkt, RDMA_MEM_GMC, &rdma->cmdq_reg, rdma->regs, in mtk_rdma_layer_config()
249 mtk_ddp_write_mask(cmdq_pkt, RDMA_MODE_MEMORY, &rdma->cmdq_reg, rdma->regs, in mtk_rdma_layer_config()
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A Dmtk_disp_ccorr.c44 struct cmdq_client_reg cmdq_reg; member
68 mtk_ddp_write(cmdq_pkt, w << 16 | h, &ccorr->cmdq_reg, ccorr->regs, in mtk_ccorr_config()
70 mtk_ddp_write(cmdq_pkt, CCORR_ENGINE_EN, &ccorr->cmdq_reg, ccorr->regs, in mtk_ccorr_config()
130 &ccorr->cmdq_reg, ccorr->regs, DISP_CCORR_COEF_0); in mtk_ccorr_ctm_set()
132 &ccorr->cmdq_reg, ccorr->regs, DISP_CCORR_COEF_1); in mtk_ccorr_ctm_set()
134 &ccorr->cmdq_reg, ccorr->regs, DISP_CCORR_COEF_2); in mtk_ccorr_ctm_set()
136 &ccorr->cmdq_reg, ccorr->regs, DISP_CCORR_COEF_3); in mtk_ccorr_ctm_set()
138 &ccorr->cmdq_reg, ccorr->regs, DISP_CCORR_COEF_4); in mtk_ccorr_ctm_set()
182 ret = cmdq_dev_get_client_reg(dev, &priv->cmdq_reg, 0); in mtk_disp_ccorr_probe()
A Dmtk_disp_ovl.c78 struct cmdq_client_reg cmdq_reg; member
227 mtk_ddp_write(cmdq_pkt, 0x1, &ovl->cmdq_reg, ovl->regs, in mtk_ovl_layer_on()
239 &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_RDMA_GMC(idx)); in mtk_ovl_layer_on()
240 mtk_ddp_write_mask(cmdq_pkt, BIT(idx), &ovl->cmdq_reg, ovl->regs, in mtk_ovl_layer_on()
249 mtk_ddp_write_mask(cmdq_pkt, 0, &ovl->cmdq_reg, ovl->regs, in mtk_ovl_layer_off()
251 mtk_ddp_write(cmdq_pkt, 0, &ovl->cmdq_reg, ovl->regs, in mtk_ovl_layer_off()
323 mtk_ddp_write_relaxed(cmdq_pkt, con, &ovl->cmdq_reg, ovl->regs, in mtk_ovl_layer_config()
325 mtk_ddp_write_relaxed(cmdq_pkt, pitch, &ovl->cmdq_reg, ovl->regs, in mtk_ovl_layer_config()
329 mtk_ddp_write_relaxed(cmdq_pkt, offset, &ovl->cmdq_reg, ovl->regs, in mtk_ovl_layer_config()
331 mtk_ddp_write_relaxed(cmdq_pkt, addr, &ovl->cmdq_reg, ovl->regs, in mtk_ovl_layer_config()
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A Dmtk_disp_aal.c36 struct cmdq_client_reg cmdq_reg; member
60 mtk_ddp_write(cmdq_pkt, w << 16 | h, &aal->cmdq_reg, aal->regs, DISP_AAL_SIZE); in mtk_aal_config()
61 mtk_ddp_write(cmdq_pkt, w << 16 | h, &aal->cmdq_reg, aal->regs, DISP_AAL_OUTPUT_SIZE); in mtk_aal_config()
127 ret = cmdq_dev_get_client_reg(dev, &priv->cmdq_reg, 0); in mtk_disp_aal_probe()
A Dmtk_disp_color.c42 struct cmdq_client_reg cmdq_reg; member
66 mtk_ddp_write(cmdq_pkt, w, &color->cmdq_reg, color->regs, DISP_COLOR_WIDTH(color)); in mtk_color_config()
67 mtk_ddp_write(cmdq_pkt, h, &color->cmdq_reg, color->regs, DISP_COLOR_HEIGHT(color)); in mtk_color_config()
119 ret = cmdq_dev_get_client_reg(dev, &priv->cmdq_reg, 0); in mtk_disp_color_probe()
A Dmtk_disp_gamma.c38 struct cmdq_client_reg cmdq_reg; member
91 mtk_ddp_write(cmdq_pkt, h << 16 | w, &gamma->cmdq_reg, gamma->regs, in mtk_gamma_config()
94 mtk_dither_set_common(gamma->regs, &gamma->cmdq_reg, bpc, in mtk_gamma_config()
153 ret = cmdq_dev_get_client_reg(dev, &priv->cmdq_reg, 0); in mtk_disp_gamma_probe()
A Dmtk_drm_ddp_comp.h196 struct cmdq_client_reg *cmdq_reg, void __iomem *regs,
199 struct cmdq_client_reg *cmdq_reg, void __iomem *regs,
202 struct cmdq_client_reg *cmdq_reg, void __iomem *regs,
A Dmtk_disp_drv.h38 void mtk_dither_set_common(void __iomem *regs, struct cmdq_client_reg *cmdq_reg,

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