Searched refs:cntr_idx (Results 1 – 11 of 11) sorted by relevance
580 val = config->cntr_idx; in cntr_idx_show()604 config->cntr_idx = val; in cntr_idx_store()609 static DEVICE_ATTR_RW(cntr_idx);619 val = config->cntr_rld_val[config->cntr_idx]; in cntr_rld_val_show()639 config->cntr_rld_val[config->cntr_idx] = val; in cntr_rld_val_store()654 val = config->cntr_event[config->cntr_idx]; in cntr_event_show()674 config->cntr_event[config->cntr_idx] = val & ETM_EVENT_MASK; in cntr_event_store()689 val = config->cntr_rld_event[config->cntr_idx]; in cntr_rld_event_show()709 config->cntr_rld_event[config->cntr_idx] = val & ETM_EVENT_MASK; in cntr_rld_event_store()755 config->cntr_val[config->cntr_idx] = val; in cntr_val_store()
232 config->cntr_idx = 0x0; in reset_store()1507 val = config->cntr_idx; in cntr_idx_show()1529 config->cntr_idx = val; in cntr_idx_store()1533 static DEVICE_ATTR_RW(cntr_idx);1545 idx = config->cntr_idx; in cntrldvr_show()1566 idx = config->cntr_idx; in cntrldvr_store()1583 idx = config->cntr_idx; in cntr_val_show()1604 idx = config->cntr_idx; in cntr_val_store()1621 idx = config->cntr_idx; in cntr_ctrl_show()1640 idx = config->cntr_idx; in cntr_ctrl_store()
189 u8 cntr_idx; member
783 u8 cntr_idx; member
71 static u32 hisi_ddrc_pmu_v1_get_counter_offset(int cntr_idx) in hisi_ddrc_pmu_v1_get_counter_offset() argument73 return ddrc_reg_off[cntr_idx]; in hisi_ddrc_pmu_v1_get_counter_offset()76 static u32 hisi_ddrc_pmu_v2_get_counter_offset(int cntr_idx) in hisi_ddrc_pmu_v2_get_counter_offset() argument78 return DDRC_V2_EVENT_CNT + cntr_idx * 8; in hisi_ddrc_pmu_v2_get_counter_offset()
163 static u32 hisi_hha_pmu_get_counter_offset(int cntr_idx) in hisi_hha_pmu_get_counter_offset() argument165 return (HHA_CNT0_LOWER + (cntr_idx * 8)); in hisi_hha_pmu_get_counter_offset()
228 static u32 hisi_l3c_pmu_get_counter_offset(int cntr_idx) in hisi_l3c_pmu_get_counter_offset() argument230 return (L3C_CNTR0_LOWER + (cntr_idx * 8)); in hisi_l3c_pmu_get_counter_offset()
1225 int cntr_idx, escr_idx; in p4_pmu_schedule_events() local1253 cntr_idx = hwc->idx; in p4_pmu_schedule_events()1259 cntr_idx = p4_next_cntr(thread, used_mask, bind); in p4_pmu_schedule_events()1260 if (cntr_idx == -1 || test_bit(escr_idx, escr_mask)) { in p4_pmu_schedule_events()1291 assign[i] = cntr_idx; in p4_pmu_schedule_events()1293 set_bit(cntr_idx, used_mask); in p4_pmu_schedule_events()
61 What: /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/cntr_idx71 Description: (RW) Used in conjunction with cntr_idx, give access to the78 Description: (RW) Used in conjunction with cntr_idx, give access to the85 Description: (RW) Used in conjunction with cntr_idx, give access to the92 Description: (RW) Used in conjunction with cntr_idx, give access to the
208 What: /sys/bus/coresight/devices/etm<N>/cntr_idx
330 :File: ``cntr_idx`` (rw)336 ``echo idx > cntr_idx``347 :Depends: ``cntr_idx``360 :Depends: ``cntr_idx``
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