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Searched refs:conf_regs (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/iio/light/
A Dcm32181.c81 u16 conf_regs[CM32181_CONF_REG_NUM]; member
155 cm32181->conf_regs[i] = vals[CPM0_HEADER_SIZE + i]; in cm32181_acpi_parse_cpm_tables()
213 cm32181->conf_regs[CM32181_REG_ADDR_CMD] = in cm32181_reg_init()
226 cm32181->conf_regs[i]); in cm32181_reg_init()
248 als_it = cm32181->conf_regs[CM32181_REG_ADDR_CMD]; in cm32181_read_als_it()
287 cm32181->conf_regs[CM32181_REG_ADDR_CMD] &= in cm32181_write_als_it()
289 cm32181->conf_regs[CM32181_REG_ADDR_CMD] |= in cm32181_write_als_it()
292 cm32181->conf_regs[CM32181_REG_ADDR_CMD]); in cm32181_write_als_it()
/linux/drivers/mtd/nand/raw/
A Dpl35x-nand-controller.c140 void __iomem *conf_regs; member
220 nfc->conf_regs + PL35X_SMC_DIRECT_CMD); in pl35x_smc_update_regs()
228 writel(bw, nfc->conf_regs + PL35X_SMC_OPMODE); in pl35x_smc_set_buswidth()
237 nfc->conf_regs + PL35X_SMC_MEMC_CFG_CLR); in pl35x_smc_clear_irq()
280 ecc_cfg = readl(nfc->conf_regs + PL35X_SMC_ECC_CFG); in pl35x_smc_set_ecc_mode()
283 writel(ecc_cfg, nfc->conf_regs + PL35X_SMC_ECC_CFG); in pl35x_smc_set_ecc_mode()
1001 nfc->conf_regs + PL35X_SMC_MEMC_CFG_CLR); in pl35x_nand_reset_state()
1021 nfc->conf_regs + PL35X_SMC_ECC_CMD1); in pl35x_nand_reset_state()
1026 nfc->conf_regs + PL35X_SMC_ECC_CMD2); in pl35x_nand_reset_state()
1146 if (IS_ERR(nfc->conf_regs)) in pl35x_nand_probe()
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