Searched refs:crtc_hblank_start (Results 1 – 20 of 20) sorted by relevance
283 blank_width = adjusted_mode->crtc_hblank_end - adjusted_mode->crtc_hblank_start; in centre_horizontally()290 adjusted_mode->crtc_hblank_start = width + border; in centre_horizontally()291 adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_hblank_start + blank_width; in centre_horizontally()293 adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hblank_start + sync_pos; in centre_horizontally()
1176 adjusted_mode->crtc_hblank_start = adjusted_mode->crtc_hdisplay; in bxt_dsi_get_pipe_config()1248 if (adjusted_mode->crtc_hblank_start == crtc_hblank_start_sw) in bxt_dsi_get_pipe_config()1249 adjusted_mode->crtc_hblank_start = in bxt_dsi_get_pipe_config()1250 adjusted_mode_sw->crtc_hblank_start; in bxt_dsi_get_pipe_config()
578 adjusted_mode->crtc_hblank_start, in ns2501_mode_set()
428 adjusted_mode->crtc_hblank_start > 4096) in hsw_crt_compute_config()
3542 pipe_mode->crtc_hblank_start /= 2; in intel_crtc_readout_derived_state()3561 pipe_mode->crtc_hblank_start = (pipe_mode->crtc_hblank_start - overlap) * n; in intel_crtc_readout_derived_state()3603 pipe_mode->crtc_hblank_start /= 2; in intel_crtc_compute_config()3616 pipe_mode->crtc_hblank_start = (pipe_mode->crtc_hblank_start - overlap) * n; in intel_crtc_compute_config()3883 (adjusted_mode->crtc_hblank_start - 1) | ((adjusted_mode->crtc_hblank_end - 1) << 16)); in intel_set_transcoder_timings()3947 pipe_config->hw.adjusted_mode.crtc_hblank_start = in intel_get_transcoder_timings()7616 PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hblank_start); in intel_pipe_config_compare()7630 PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hblank_start); in intel_pipe_config_compare()
958 mode->crtc_hblank_start % pixels_per_group == 0 && in gcp_default_phase_possible()2029 adjusted_mode->crtc_hblank_start) % 8 == 2) in hdmi_deep_color_possible()
1514 adjusted_mode->crtc_hblank_start = adjusted_mode->crtc_hdisplay; in gen11_dsi_get_timings()
793 hblank_total = adjusted_mode->crtc_hblank_end - adjusted_mode->crtc_hblank_start; in _compute_psr2_sdp_prior_scanline_indication()
1827 adjusted_mode->crtc_hblank_start = adjusted_mode->crtc_hblank_start / n + overlap; in intel_dp_compute_config()
328 …REG_WRITE(hblank_reg, (adjusted_mode->crtc_hblank_start - 1) | ((adjusted_mode->crtc_hblank_end - … in oaktrail_crtc_hdmi_mode_set()336 …REG_WRITE(PCH_HBLANK_B, (adjusted_mode->crtc_hblank_start - 1) | ((adjusted_mode->crtc_hblank_end … in oaktrail_crtc_hdmi_mode_set()343 temp = adjusted_mode->crtc_hblank_end - adjusted_mode->crtc_hblank_start; in oaktrail_crtc_hdmi_mode_set()
447 (adjusted_mode->crtc_hblank_start - offsetX - 1) | in oaktrail_crtc_mode_set()465 REG_WRITE_WITH_AUX(map->hblank, (adjusted_mode->crtc_hblank_start - 1) | in oaktrail_crtc_mode_set()
263 REG_WRITE(map->hblank, (adjusted_mode->crtc_hblank_start - 1) | in psb_intel_crtc_mode_set()
779 REG_WRITE(map->hblank, (adjusted_mode->crtc_hblank_start - 1) | in cdv_intel_crtc_mode_set()
741 h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start; in psb_intel_sdvo_get_dtd_from_mode()747 h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start; in psb_intel_sdvo_get_dtd_from_mode()
297 u16 crtc_hblank_start; member
163 blank_width = (mode->crtc_hblank_end - mode->crtc_hblank_start) / 8; in radeon_legacy_rmx_mode_set()174 fp_h_sync_strt_wid = ((((mode->crtc_hsync_start - mode->crtc_hblank_start) / 8) & 0x1fff) in radeon_legacy_rmx_mode_set()
168 ENCODE_PGU_XY(m->crtc_hblank_end - m->crtc_hblank_start, in arc_pgu_mode_set()
185 adjusted_mode->crtc_hblank_start = vbios_mode->enh_table->hde + hborder; in ast_get_vbios_mode_info()331 temp = (mode->crtc_hblank_start >> 3) - 1; in ast_set_crtc_reg()
873 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay); in drm_mode_set_crtcinfo()
5949 dst_mode->crtc_hblank_start = src_mode->crtc_hblank_start; in copy_crtc_timing_for_drm_display_mode()
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