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Searched refs:cur_min_clks_state (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/
A Ddce112_clk_mgr.c97 clk_mgr_dce->cur_min_clks_state = DM_PP_CLOCKS_STATE_NOMINAL; in dce112_set_clock()
153 clk_mgr->cur_min_clks_state = DM_PP_CLOCKS_STATE_NOMINAL; in dce112_set_dispclk()
209 if ((level_change_req.power_level < clk_mgr_dce->cur_min_clks_state && safe_to_lower) in dce112_update_clocks()
210 || level_change_req.power_level > clk_mgr_dce->cur_min_clks_state) { in dce112_update_clocks()
212 clk_mgr_dce->cur_min_clks_state = level_change_req.power_level; in dce112_update_clocks()
/linux/drivers/gpu/drm/amd/display/dc/dce/
A Ddce_clk_mgr.c280 clk_mgr_dce->cur_min_clks_state = DM_PP_CLOCKS_STATE_NOMINAL; in dce_set_clock()
314 clk_mgr_dce->cur_min_clks_state = DM_PP_CLOCKS_STATE_NOMINAL; in dce112_set_clock()
684 if ((level_change_req.power_level < clk_mgr_dce->cur_min_clks_state && safe_to_lower) in dce_update_clocks()
685 || level_change_req.power_level > clk_mgr_dce->cur_min_clks_state) { in dce_update_clocks()
687 clk_mgr_dce->cur_min_clks_state = level_change_req.power_level; in dce_update_clocks()
711 if ((level_change_req.power_level < clk_mgr_dce->cur_min_clks_state && safe_to_lower) in dce11_update_clocks()
712 || level_change_req.power_level > clk_mgr_dce->cur_min_clks_state) { in dce11_update_clocks()
714 clk_mgr_dce->cur_min_clks_state = level_change_req.power_level; in dce11_update_clocks()
739 || level_change_req.power_level > clk_mgr_dce->cur_min_clks_state) { in dce112_update_clocks()
741 clk_mgr_dce->cur_min_clks_state = level_change_req.power_level; in dce112_update_clocks()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce60/
A Ddce60_clk_mgr.c134 if ((level_change_req.power_level < clk_mgr_dce->cur_min_clks_state && safe_to_lower) in dce60_update_clocks()
135 || level_change_req.power_level > clk_mgr_dce->cur_min_clks_state) { in dce60_update_clocks()
137 clk_mgr_dce->cur_min_clks_state = level_change_req.power_level; in dce60_update_clocks()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/
A Ddce_clk_mgr.c263 clk_mgr_dce->cur_min_clks_state = DM_PP_CLOCKS_STATE_NOMINAL; in dce_set_clock()
409 if ((level_change_req.power_level < clk_mgr_dce->cur_min_clks_state && safe_to_lower) in dce_update_clocks()
410 || level_change_req.power_level > clk_mgr_dce->cur_min_clks_state) { in dce_update_clocks()
412 clk_mgr_dce->cur_min_clks_state = level_change_req.power_level; in dce_update_clocks()
461 clk_mgr->cur_min_clks_state = DM_PP_CLOCKS_STATE_INVALID; in dce_clk_mgr_construct()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/
A Ddce110_clk_mgr.c263 if ((level_change_req.power_level < clk_mgr_dce->cur_min_clks_state && safe_to_lower) in dce11_update_clocks()
264 || level_change_req.power_level > clk_mgr_dce->cur_min_clks_state) { in dce11_update_clocks()
266 clk_mgr_dce->cur_min_clks_state = level_change_req.power_level; in dce11_update_clocks()
/linux/drivers/gpu/drm/amd/display/dc/inc/hw/
A Dclk_mgr_internal.h294 enum dm_pp_clocks_state cur_min_clks_state; member

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