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Searched refs:dar (Results 1 – 25 of 81) sorted by relevance

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/linux/arch/powerpc/kernel/
A Dhw_breakpoint_constraints.c9 static bool dar_in_user_range(unsigned long dar, struct arch_hw_breakpoint *info) in dar_in_user_range() argument
11 return ((info->address <= dar) && (dar - info->address < info->len)); in dar_in_user_range()
21 static bool dar_in_hw_range(unsigned long dar, struct arch_hw_breakpoint *info) in dar_in_hw_range() argument
28 return ((hw_start_addr <= dar) && (hw_end_addr > dar)); in dar_in_hw_range()
87 bool in_user_range = dar_in_user_range(regs->dar, info); in wp_check_constraints()
102 !dar_in_hw_range(regs->dar, info)) in wp_check_constraints()
112 !dar_in_hw_range(regs->dar, info)) in wp_check_constraints()
A Dppc32.h26 unsigned int dar; /* Fault registers */ member
/linux/drivers/misc/cxl/
A Dfault.c105 ctx->fault_addr = ctx->dar; in cxl_ack_ae()
167 if (!mm && (get_region_id(dar) != USER_REGION_ID)) in cxl_handle_mm_fault()
174 hash_page_mm(mm, dar, access, 0x300, inv_flags); in cxl_handle_mm_fault()
182 u64 dsisr, u64 dar) in cxl_handle_page_fault() argument
184 trace_cxl_pte_miss(ctx, dsisr, dar); in cxl_handle_page_fault()
186 if (cxl_handle_mm_fault(mm, dsisr, dar)) { in cxl_handle_page_fault()
233 u64 dar = ctx->dar; in cxl_handle_fault() local
238 cxl_p2n_read(ctx->afu, CXL_PSL_DAR_An) != dar || in cxl_handle_fault()
256 "DSISR: %#llx DAR: %#llx\n", ctx->pe, dsisr, dar); in cxl_handle_fault()
273 cxl_handle_segment_miss(ctx, mm, dar); in cxl_handle_fault()
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A Dirq.c25 static irqreturn_t schedule_cxl_fault(struct cxl_context *ctx, u64 dsisr, u64 dar) in schedule_cxl_fault() argument
28 ctx->dar = dar; in schedule_cxl_fault()
35 u64 dsisr, dar; in cxl_irq_psl9() local
38 dar = irq_info->dar; in cxl_irq_psl9()
40 trace_cxl_psl9_irq(ctx, irq, dsisr, dar); in cxl_irq_psl9()
46 return schedule_cxl_fault(ctx, dsisr, dar); in cxl_irq_psl9()
86 u64 dsisr, dar; in cxl_irq_psl8() local
89 dar = irq_info->dar; in cxl_irq_psl8()
91 trace_cxl_psl_irq(ctx, irq, dsisr, dar); in cxl_irq_psl8()
107 return schedule_cxl_fault(ctx, dsisr, dar); in cxl_irq_psl8()
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A Dtrace.h173 __field(u64, dar)
182 __entry->dar = dar;
192 __entry->dar
207 __field(u64, dar)
216 __entry->dar = dar;
225 __entry->dar
259 TP_ARGS(ctx, dar),
272 __entry->dar = dar;
279 __entry->dar
334 __entry->dar = dar;
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A Dcxllib.c226 u64 dar, vma_start, vma_end; in cxllib_handle_fault() local
242 for (dar = (addr & ~(page_size - 1)); dar < (addr + size); in cxllib_handle_fault()
243 dar += page_size) { in cxllib_handle_fault()
244 if (dar < vma_start || dar >= vma_end) { in cxllib_handle_fault()
258 rc = get_vma_info(mm, dar, &vma_start, &vma_end, in cxllib_handle_fault()
264 rc = cxl_handle_mm_fault(mm, flags, dar); in cxllib_handle_fault()
/linux/drivers/misc/ocxl/
A Dtrace.h135 TP_PROTO(void *spa, u64 pe, u64 dsisr, u64 dar, u64 tfc),
136 TP_ARGS(spa, pe, dsisr, dar, tfc),
142 __field(u64, dar)
150 __entry->dar = dar;
158 __entry->dar,
164 TP_PROTO(void *spa, u64 pe, u64 dsisr, u64 dar, u64 tfc),
165 TP_ARGS(spa, pe, dsisr, dar, tfc)
169 TP_PROTO(void *spa, u64 pe, u64 dsisr, u64 dar, u64 tfc),
170 TP_ARGS(spa, pe, dsisr, dar, tfc)
A Dlink.c72 u64 dar; member
107 static void read_irq(struct spa *spa, u64 *dsisr, u64 *dar, u64 *pe) in read_irq() argument
112 *dar = in_be64(spa->reg_dar); in read_irq()
131 spa->xsl_fault.dsisr, spa->xsl_fault.dar, reg); in ack_irq()
158 fault->dar, fault->dsisr); in xsl_fault_handler_bh()
174 if (get_region_id(fault->dar) != USER_REGION_ID) in xsl_fault_handler_bh()
178 hash_page_mm(fault->pe_data.mm, fault->dar, access, 0x300, in xsl_fault_handler_bh()
192 u64 dsisr, dar, pe_handle; in xsl_fault_handler() local
198 read_irq(spa, &dsisr, &dar, &pe_handle); in xsl_fault_handler()
199 trace_ocxl_fault(spa->spa_mem, pe_handle, dsisr, dar, -1); in xsl_fault_handler()
[all …]
/linux/tools/testing/selftests/powerpc/mm/
A Dsubpage_prot.c34 volatile void *dar; variable
48 dar = (void *)regs->dar; in segv()
84 if (dar != addr) { in check_faulted()
86 addr, dar); in check_faulted()
/linux/arch/sh/drivers/dma/
A Ddma-g2.c102 if (chan->dar & 31) { in g2_xfer_dma()
103 printk("g2dma: unaligned dest 0x%lx\n", chan->dar); in g2_xfer_dma()
112 chan->dar += 0xa0800000; in g2_xfer_dma()
121 g2_dma->channel[chan_nr].g2_addr = chan->dar & 0x1fffffe0; in g2_xfer_dma()
A Ddma-pvr2.c55 if (chan->sar || !chan->dar) in pvr2_xfer_dma()
60 __raw_writel(chan->dar, PVR2_DMA_ADDR); in pvr2_xfer_dma()
/linux/arch/powerpc/mm/
A Dfault.c544 err = ___do_page_fault(regs, regs->dar, regs->dsisr); in __do_page_fault()
579 regs->dar < PAGE_SIZE ? "Kernel NULL pointer dereference" : in __bad_page_fault()
581 is_write ? "write" : "read", regs->dar); in __bad_page_fault()
590 regs->dar); in __bad_page_fault()
594 regs->dar); in __bad_page_fault()
/linux/arch/powerpc/kvm/
A Dtrace_booke.h46 __field( unsigned long, dar )
53 __entry->dar = kvmppc_get_fault_dar(vcpu);
67 __entry->dar,
A Dtrace_pr.h225 __field( unsigned long, dar )
233 __entry->dar = kvmppc_get_fault_dar(vcpu);
249 __entry->dar,
A Dbook3s_emulate.c1047 ulong dar = 0; in kvmppc_alignment_dar()
1057 dar = kvmppc_get_gpr(vcpu, ra); in kvmppc_alignment_dar()
1058 dar += (s32)((s16)inst); in kvmppc_alignment_dar()
1062 dar = kvmppc_get_gpr(vcpu, ra); in kvmppc_alignment_dar()
1063 dar += kvmppc_get_gpr(vcpu, rb); in kvmppc_alignment_dar()
1070 return dar; in kvmppc_alignment_dar()
/linux/arch/powerpc/include/asm/
A Dpnv-ocxl.h68 void pnv_ocxl_unmap_xsl_regs(void __iomem *dsisr, void __iomem *dar,
71 void __iomem **dar, void __iomem **tfc,
/linux/arch/powerpc/kernel/ptrace/
A Dptrace.c374 BUILD_BUG_ON(offsetof(struct pt_regs, dar) != in pt_regs_check()
375 offsetof(struct user_pt_regs, dar)); in pt_regs_check()
377 offsetof(struct user_pt_regs, dar)); in pt_regs_check()
437 CHECK_REG(PT_DAR, dar); in pt_regs_check()
/linux/drivers/dma/dw-edma/
A Ddw-edma-v0-core.c333 SET_LL_64(&lli[i].dar.reg, child->dar); in dw_edma_v0_core_write_chunk()
335 SET_LL_32(&lli[i].dar.lsb, lower_32_bits(child->dar)); in dw_edma_v0_core_write_chunk()
336 SET_LL_32(&lli[i].dar.msb, upper_32_bits(child->dar)); in dw_edma_v0_core_write_chunk()
A Ddw-edma-v0-regs.h44 } dar; member
218 } dar; member
/linux/drivers/dma/
A Didma64.c234 u64 sar, dar; in idma64_hw_desc_fill() local
241 dar = config->dst_addr; in idma64_hw_desc_fill()
248 dar = hw->phys; in idma64_hw_desc_fill()
252 dst_width = __ffs(dar | hw->len | 4); in idma64_hw_desc_fill()
256 lli->dar = dar; in idma64_hw_desc_fill()
/linux/arch/powerpc/perf/
A Dperf_regs.c68 PT_REGS_OFFSET(PERF_REG_POWERPC_DAR, dar),
70 PT_REGS_OFFSET(PERF_REG_POWERPC_SIER, dar),
/linux/arch/powerpc/platforms/powernv/
A Docxl.c386 void pnv_ocxl_unmap_xsl_regs(void __iomem *dsisr, void __iomem *dar, in pnv_ocxl_unmap_xsl_regs() argument
390 iounmap(dar); in pnv_ocxl_unmap_xsl_regs()
397 void __iomem **dar, void __iomem **tfc, in pnv_ocxl_map_xsl_regs() argument
426 *dar = regs[1]; in pnv_ocxl_map_xsl_regs()
/linux/arch/powerpc/platforms/cell/
A Dspu_base.c307 unsigned long stat, mask, dar, dsisr; in spu_irq_class_1() local
315 dar = spu_mfc_dar_get(spu); in spu_irq_class_1()
322 dar, dsisr); in spu_irq_class_1()
325 __spu_trap_data_seg(spu, dar); in spu_irq_class_1()
328 __spu_trap_data_map(spu, dar, dsisr); in spu_irq_class_1()
/linux/tools/perf/arch/powerpc/include/
A Ddwarf-regs-table.h24 REG_DWARFNUM_NAME(dar, 119),
/linux/arch/powerpc/platforms/8xx/
A Dmachine_check.c20 pr_cont("Data access error at address %lx\n", regs->dar); in machine_check_8xx()

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